Motorola DSP96002 manuals
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Motorola DSP96002 User Manual
897 pages 2.6 Mb
MOTOROLA DSP96002 USERS MANUAL 1 - 1 2 SECTION 1 DSP96002 INTRODUCTION 4 SECTION 2 SIGNAL DESCRIPTION AND BUS OPERATION5 2 - 2 DSP96002 USERS MANUAL MOTOROLA Figure 2-1. DSP96002 Functional Group Pin Allocation MOTOROLA DSP96002 USERS MANUAL 2 - 3 6 Figure 2-2. DSP96002 Functional Signal Groups DSP960027 2 - 4 DSP96002 USERS MANUAL MOTOROLA 2.1.3 Power and Clock (39 Pins) 8 MOTOROLA DSP96002 USERS MANUAL 2 - 5 2.1.5 Port A and Port B (162 Pins) 2.1.4 On-chip Emulator Interface (OnCE) (4 Pins) 9 2 - 6 DSP96002 USERS MANUAL MOTOROLA Figure 2-3. Program and Data Memory Select Encoding 10 MOTOROLA DSP96002 USERS MANUAL 2 - 7 11 2 - 8 DSP96002 USERS MANUAL MOTOROLA Figure 2-4. Bus Status Encoding 12 MOTOROLA DSP96002 USERS MANUAL 2 - 9 13 2 - 10 DSP96002 USERS MANUAL MOTOROLA 14 MOTOROLA DSP96002 USERS MANUAL 2 - 11 15 2 - 12 DSP96002 USERS MANUAL MOTOROLA 2.2.1 Synchronous Bus Operation 2.2 BUS OPERATION 2.1.6 Reserved Pins 18 MOTOROLA DSP96002 USERS MANUAL 2 - 15 4.11.1 Bus Arbitration Signals 4.11 BUS HANDSHAKE AND ARBITRATION 19 4.11.2 The Arbitration Protocol 5.16.1 Arbitration Scheme 2 - 16 DSP96002 USERS MANUAL MOTOROLA 20 MOTOROLA DSP96002 USERS MANUAL 2 - 17 Figure 2-7. Bus Arbitration Scheme 5.16.2 Bus Handshake Unit Figure 2-8. Bus Handshake Unit 21 2 - 18 DSP96002 USERS MANUAL MOTOROLA Figure 2-9. Bus Handshake State Diagram 24 SECTION 3 CHIP ARCHITECTURE26 3.2.3 Data ALU 3.2.5 X Data Memory 3.2.4 AGU MOTOROLA DSP96002 USERS MANUAL 3 - 3 27 3.2.6 Y Data Memory 3.2.7 Program Control and System Stack 3 - 4 DSP96002 USERS MANUAL MOTOROLA 29 3 - 6 DSP96002 USERS MANUAL MOTOROLA 3.3 DATA ALU BLOCK DIAGRAM 3.2.11.2 DMA Controller 32 MOTOROLA DSP96002 USERS MANUAL 3 - 9 3.3.2.3 Barrel Shifter and Normalization Unit 3.3.2.2 Subtract Unit 3.3.2.1 Add Unit 34 3.4 AGU 3.4.3 Modifier Register Files 3.4.2 Offset Register Files 3.4.1 Address Register Files MOTOROLA DSP96002 USERS MANUAL 3 - 11 36 MOTOROLA DSP96002 USERS MANUAL 3 - 13 3.4.6 Address Output Multiplexers 3.4.5 Modulo Arithmetic Units MOTOROLA DSP96002 USERS MANUAL 4 - 1 40 SECTION 4 SOFTWARE ARCHITECTURE Figure 4-1. DSP96002 Programming Model - Program Controller 41 4 - 2 DSP96002 USERS MANUAL MOTOROLA 4.2 DATA ALU REGISTER FILE (D0-D9) Figure 4-2. DSP96002 Programming Model Data ALU and Address Generation Unit 43 4 - 4 DSP96002 USERS MANUAL MOTOROLA 4.7.1 CCR Carry (C) Bit 0 4.7 STATUS REGISTER (SR) 4.6 PROGRAM COUNTER (PC) 44 MOTOROLA DSP96002 USERS MANUAL 4 - 5 Figure 4-3. SR Format 46 MOTOROLA DSP96002 USERS MANUAL 4 - 7 4.7.10 ER Divide-by-Zero (DZ) Bit 9 4.7.15 ER Not-a-Number (NAN) Bit 14 4.7.14 ER Signaling NaN (SNAN) Bit 13 4.7.13 ER Operand Error (OPERR) Bit 12 4.7.12 ER Overflow (OVF) Bit 11 4.7.11 ER Underflow (UNF) Bit 10 48 MOTOROLA DSP96002 USERS MANUAL 4 - 9 4.7.25 Flush to Zero (FZ) Bit 27 4.7.24 MR Multiply Precision Control (MP) Bit 26 4.7.23 Reserved Status (Bits 23,24,25) 51 4 - 12 DSP96002 USERS MANUAL MOTOROLA 4.11.2 Stack Error flag (SE) Bit 4 Figure 4-5. Stack Pointer Values 54 SECTION 5 DATA ORGANIZATION AND ADDRESSING MODES55 5 - 2 DSP96002 USERS MANUAL MOTOROLA Figure 5-2. Bit Weighting and Alignment of Unsigned Integer Operands Figure 5-1. Bit Weighting and Alignment of Signed Integer Operands 56 MOTOROLA DSP96002 USERS MANUAL 5 - 3 Figure 5-3. Memory Format for floating-point Operands IEEE Single Precision Real Memory Format Summary 5.2.2.1 57 5 - 4 DSP96002 USERS MANUAL MOTOROLA 5.2.2.2 Double Precision Real Memory Format Summary 58 MOTOROLA DSP96002 USERS MANUAL 5 - 5 5.3 DATA ORGANIZATION IN REGISTERS 5.3.1 Data ALU Registers 59 5 - 6 DSP96002 USERS MANUAL MOTOROLA 5.3.1.2 Internal Double Precision Format Summary Figure 5-4. Data Format in the Floating Point Registers 5.3.1.1 Internal floating-point Data Format 60 MOTOROLA DSP96002 USERS MANUAL 5 - 7 61 5 - 8 DSP96002 USERS MANUAL MOTOROLA 5.4 NOT-A-NUMBER IMPLEMENTATION 5.3.3 Program Control Registers 5.3.2 Address Generation Unit (AGU) Registers 62 MOTOROLA DSP96002 USERS MANUAL 5 - 9 5.5.1 Conversion to the Double Precision Internal Data Format 5.5 AUTOMATIC FLOATING-POINT FORMAT CONVERSIONS 63 Figure 5-5. Conversion to Double Precision Internal Data Format 5 - 10 DSP96002 USERS MANUAL MOTOROLA 64 MOTOROLA DSP96002 USERS MANUAL 5 - 11 5.5.2 Conversion to the Memory Formats 5.6 OPERAND REFERENCES 5.6.1 Program References 5.6.2 Stack References 65 5 - 12 DSP96002 USERS MANUAL MOTOROLAFigure 5-6. Conversion from Internal Format to Memory Formats 5.6.3 R Register References 67 5 - 14 DSP96002 USERS MANUAL MOTOROLA 5.7 ADDRESSING MODES 5.7.1 Register Direct Modes 5.7.1.1 Data or Control Register Direct 5.7.1.2 Address Register Direct 71 5 - 18 DSP96002 USERS MANUAL MOTOROLA 5.8.1 Linear Modifier 5.8.2 Reverse Carry Modifier 5.8.3 Modulo Modifier 72 MOTOROLA DSP96002 USERS MANUAL 5 - 19Figure 5-7. Addressing Modes Summary 73 5 - 20 DSP96002 USERS MANUAL MOTOROLA 5.8.4 Multiple Wrap-Around Modulo Modifier 75 5 - 22 DSP96002 USERS MANUAL MOTOROLAModifier MMMMMM MM Address Calculation Arithmetic 77 SECTION 6 INSTRUCTION SET AND EXECUTION78 6 - 2 DSP96002 USERS MANUAL MOTOROLA Figure 6-1. Floating-Point Arithmetic Instructions 79 6.2.2 Fixed-Point Arithmetic Instructions MOTOROLA DSP96002 USERS MANUAL 6 - 3 Figure 6-2. Fixed-Point Arithmetic Instructions 82 6 - 6 DSP96002 USERS MANUAL MOTOROLA Figure 6-7. Program Control Instructions 6.3 INSTRUCTION FORMAT 83 MOTOROLA DSP96002 USERS MANUAL 6 - 7 Figure 6-8. Instruction Word - General Format 84 6 - 8 DSP96002 USERS MANUAL MOTOROLA Figure 6-9. Instruction Pipelining 6.4.1 Instruction Processing 6.4 INSTRUCTION EXECUTION 85 6.4.2 Memory Access Processing MOTOROLA DSP96002 USERS MANUAL 6 - 9 87 SECTION 7 EXPANSION PORTS AND I/O PERIPHERALS88 7.2.1.1 BCRx Wait Control Fields (Bits 0-15) 7.2.1.2 BCRx Page Size (P3P0) Bits 16-19 7 - 2 DSP96002 USERS MANUAL MOTOROLA Figure 7-1. DSP96002 Bus Control Registers (BCRA and BCRB) 91 MOTOROLA DSP96002 USERS MANUAL 7 - 5 Figure 7-2. Bus Access Attributes Figure 7-3. Page Circuit Programming Parameters 92 7 - 6 DSP96002 USERS MANUAL MOTOROLA 7.2.2.1 Memory Space Enables and Page Fault Circuit Personal Reset 93 MOTOROLA DSP96002 USERS MANUAL 7 - 7 Figure 7-4b. Using SF1 to Physically separate Data and Program Spaces Figure 7-4a. Memory Space Change Detection 94 7 - 8 DSP96002 USERS MANUAL MOTOROLA 7.2.2.3 RAS, CAS and SC Timeout Faults Figure 7-5. Memory Space Enables Encoding 7.2.2.2 Refresh Faults 96 7 - 10 DSP96002 USERS MANUAL MOTOROLA 7.3.1.2 PSR Y Data Memory Port Select (Y0-Y7) Bits 8-15 7.3.1.1 PSR Program Memory Port Select (P0-P7) Bits 0-7 Figure 7-6. DSP96002 Port Select Register (PSR) 98 7 - 12 DSP96002 USERS MANUAL MOTOROLA 7.4.2 HI Reset 7.4.3 HI Operation During Stop 99 MOTOROLA DSP96002 USERS MANUAL 7 - 13Figure 7-7. Host Interface Reset - Host Processor Side 100 7 - 14 DSP96002 USERS MANUAL MOTOROLAFigure 7-8. Host Interface Reset - DSP96002 Side 7.4.4 HI Programming Model 7.4.5 Host Transmit Data Register (HTX) - DSP96002 Side 102 7 - 16 DSP96002 USERS MANUAL MOTOROLAFigure 7-10. HI - DSP96002 Programming Model 7.4.6 Host Transmit Data Register and HMRC Clear (HTXC) - DSP96002 Side 103 MOTOROLA DSP96002 USERS MANUAL 7 - 17 7.4.7 Host Receive Data Register (HRX) - DSP96002 Side Figure 7-11. HI - Host Processor Programming Model 104 7 - 18 DSP96002 USERS MANUAL MOTOROLAFigure 7-12. HI Functions 7.4.8 Host Control Register (HCR) - DSP96002 Side 7.4.8.1 HCR Host Receive Interrupt Enable (HRIE) Bit 0 105 MOTOROLA DSP96002 USERS MANUAL 7 - 19 7.4.8.2 HCR Host Transmit Interrupt Enable (HTIE) Bit 1 7.4.8.3 HCR Host Command Interrupt Enable (HCIE) Bit 2 7.4.8.4 HCR Host Flag 2 (HF2) Bit 3 7.4.8.5 HCR Host Flag 3 (HF3) Bit 4 109 MOTOROLA DSP96002 USERS MANUAL 7 - 23 7.4.9.13 HSR Host Y Memory Write Command Pending (HYWP) Bit 13 7.4.10 Receive Register (RX) - Host Processor Side 7.4.11 Transmit Register (TX) - Host Processor Side 7.4.12 Command Vector Register (CVR) - Host Processor Side 7.4.12.1 CVR Host Vector (HV) Bits 0-7 110 7 - 24 DSP96002 USERS MANUAL MOTOROLA 7.4.12.2 CVR Reserved bits (Bits 8-14, 16-31) 7.4.12.3 CVR Host Command (HC) Bit 15 7.4.13 Interrupt Control/Status Register (ICS) - Host Processor Side 7.4.13.1 ICS Receive Data Register Full (RXDF) Bit 0 7.4.13.2 ICS Transmit Data Register Empty (TXDE) Bit 1 112 7 - 26 DSP96002 USERS MANUAL MOTOROLA 7.4.13.6 ICS Transmitter Ready Request Enable (TYEQ) Bit 5 Figure 7-14. Minimum Delay to Ensure Correct INIT Execution 7.4.13.7 ICS Initialize (INIT) Bit 6 113 MOTOROLA DSP96002 USERS MANUAL 7 - 27 7.4.13.8 ICS Host Request (HREQ) Bit 7 115 MOTOROLA DSP96002 USERS MANUAL 7 - 29 7.4.13.14 ICS Host Reset Status (HRST) Bit 13 7.4.13.15 ICS Reserved bits (Bits 14, 16-31) 7.4.13.16 ICS Host Memory Read Command (HMRC) Bit 15 7.4.14 Semaphore Register (SEM) - Host Processor Side 7.4.14.1 SEM Host Semaphore (SEM0-SEM15) Bits 0-15 116 7 - 30 DSP96002 USERS MANUAL MOTOROLA 7.4.14.2 SEM Reserved bits (Bits 16-31) 7.4.15 Interrupt Vector Register (IVR) - Host Processor Side 7.4.15.1 IVR Interrupt Vector (IVR0-IVR7) Bits 0-7 7.4.15.2 IVR Reserved Bits Bits 8-31 7.4.16 HI Interrupts 119 MOTOROLA DSP96002 USERS MANUAL 7 - 33Figure 7-17. DSP96002 to DSP96002 Data Write 7.4.19.2 Data Read Using The On-Chip DMA Controllers 120 7 - 34 DSP96002 USERS MANUAL MOTOROLAFigure 7-18. DSP96002 to DSP96002 Data Read 7.4.20 External DMA Controller to DSP96002 Data Transfers - Examples 7.4.20.1 Data Write Using the DSP96002 On-Chip DMA Controller 121 MOTOROLA DSP96002 USERS MANUAL 7 - 35Figure 7-19. External DMA to DSP96002 Data Write 7.4.20.2 Data Read Using the DSP96002 On-Chip DMA Controller 122 7 - 36 DSP96002 USERS MANUAL MOTOROLAFigure 7-20. DSP96002 to External DMA Data Read 7.4.21 HI Performance Analysis and Programming Examples 123 MOTOROLA DSP96002 USERS MANUAL 7 - 37 7.4.21.1 Semaphore Control 7.4.21.2 Host Command Register Read 7.4.21.3 Host Command Register Write 126 7 - 40 DSP96002 USERS MANUAL MOTOROLA127 MOTOROLA DSP96002 USERS MANUAL 7 - 41 7.4.21.10 X/Y/P Memory Read Procedure 128 7 - 42 DSP96002 USERS MANUAL MOTOROLA129 MOTOROLA DSP96002 USERS MANUAL 7 - 43 7.4.21.11 DSP96002 to DSP96002 Transfers Using On-Chip DMA Controllers 7.5 DMA CONTROLLER 7.5.1 Introduction 130 7 - 44 DSP96002 USERS MANUAL MOTOROLAFigure 7-24. Direction of DMA Data Transfers 131 MOTOROLA DSP96002 USERS MANUAL 7 - 45 7.5.2 DMA Controller Programming Model Figure 7-25. DMA Controller Programming Model - Channel 0 132 7 - 46 DSP96002 USERS MANUAL MOTOROLAFigure 7-26. DMA Controller Programming Model - Channel 1 7.5.3 DMA Control/Status Register (DCS) 133 MOTOROLA DSP96002 USERS MANUAL 7 - 47 7.5.3.1 DCS DMA Destination Space Control (DDS2-DDS0) Bits 0,1,2 7.5.3.2 DCS DMA Source Space Control (DSS2-DSS0) Bits 3,4,5 7.5.3.3 DCS Reserved Bits (Bits 6, 7, 15-22, 27, 29) 7.5.3.4 DCS DMA Request Masks (M0-M6) Bits 8-14 134 7 - 48 DSP96002 USERS MANUAL MOTOROLA 7.5.3.5 DCS DMA Channel Priority (DCP) Bit 23 7.5.3.6 DCS DMA Priority (DMAP) Bit 24 135 MOTOROLA DSP96002 USERS MANUAL 7 - 49 7.5.3.7 DCS DMA Transfer Mode (DTM1DTM0) Bits 25,26 7.5.3.8 DCS DMA Transfer Done Status (DTD) Bit 28 7.5.3.9 DCS DMA Interrupt Enable Control Bit (DIE) Bit 30 7.5.3.10 DCS DMA Channel Enable Control Bit (DE) Bit 31 136 7 - 50 DSP96002 USERS MANUAL MOTOROLA 7.5.4 DMA Counter (DCO) 7.5.5 DMA Address Registers (DSR and DDR) 7.5.6 DMA Offset Registers (DSN and DDN) 7.5.7 DMA Modifier Registers (DSM and DDM) 7.5.8 DMA ALU 137 MOTOROLA DSP96002 USERS MANUAL 7 - 51 7.5.9 DMA Addressing Modes 7.5.10 DMA Restrictions 138 7 - 52 DSP96002 USERS MANUAL MOTOROLA 7.6 I/O MEMORY MAP 139 MOTOROLA DSP96002 USERS MANUAL 7 - 53 141 SECTION 8 EXCEPTION PROCESSING142 8.2.3 Wait Processing State 8.3 EXCEPTION PROCESSING 8.2.4 Stop Processing State 8 - 2 DSP96002 USERS MANUAL MOTOROLA 143 MOTOROLA DSP96002 USERS MANUAL 8 - 3 8.3.1 Interrupt Instruction Fetch Figure 8-1. Interrupt Pipeline Operation 144 8 - 4 DSP96002 USERS MANUAL MOTOROLA 8.3.2.1 Fast Interrupt Instruction Execution 8.3.2 Interrupt Instruction Execution 145 MOTOROLA DSP96002 USERS MANUAL 8 - 5 Figure 8-2. Example of Aborting a Two Word Instruction Fast Interrupt 146 8 - 6 DSP96002 USERS MANUAL MOTOROLA Figure 8-4. Long Interrupt Pipeline Action 148 8 - 8 DSP96002 USERS MANUAL MOTOROLA Figure 8-6. DSP96002 Interrupt Sources 149 MOTOROLA DSP96002 USERS MANUAL 8 - 9 Figure 8-7. (F)TRAPcc Instruction Rejecting Another Interrupt 8.4.4 (F)TRAPcc (Conditional Software Interrupt Instruction) 150 8 - 10 DSP96002 USERS MANUAL MOTOROLA Figure 8-8. Status Register Interrupt Mask Bits Figure 8-9. Interrupt Priority Register IPR (Address X:$FFFFFFFF) 155 MOTOROLA DSP96002 USERS MANUAL 8 - 15 8.5.2.14 Host B Interrupt Priority Level - HBL1-HBL0 (Bits 22-23) 156 8 - 16 DSP96002 USERS MANUAL MOTOROLA 8.5.3 Exception Priorities within an IPL Figure 8-12. DSP96002 Exception Priorities within an IPL MOTOROLA DSP96002 USERS MANUAL 9 - 1 157 9.1.1 Mode 0 (Internal PRAM enabled, Reset at $FFFFFFFE, Port A) Figure 9-1. DSP96002 Initial Chip Operating Mode Summary 9.1 OPERATING MODES AND PROGRAM MEMORY MAPS SECTION 9 CHIP OPERATING MODES AND MEMORY MAPS158 9.1.2 Mode 1 (Internal PRAM enabled, Reset at $FFFFFFFE, Port B) 9.1.5 Modes 4-7 (Bootstrap modes) 9.1.4 Mode 3 (Internal PRAM disabled, Reset at $00000000, Port B) 9.1.3 Mode 2 (Internal PRAM disabled, Reset at $00000000, Port A) 9 - 2 DSP96002 USERS MANUAL MOTOROLA 159 MOTOROLA DSP96002 USERS MANUAL 9 - 3 Figure 9-2. DSP96002 Program Memory Maps 160 9 - 4 DSP96002 USERS MANUAL MOTOROLA Figure 9-3. Assembler Source for DSP96002 Bootstrap Program (1 of 3) 161 MOTOROLA DSP96002 USERS MANUAL 9 - 5 Figure 9-3. Assembler Source for DSP96002 Bootstrap Program (2 of 3) 162 9 - 6 DSP96002 USERS MANUAL MOTOROLA 9.2 DATA MEMORY MAPS Figure 9-3. Assembler Source for DSP96002 Bootstrap Program (3 of 3) 163 9.2.1 Internal Data RAMs Figure 9-4. DSP96002 Data Memory Maps for DE=0 9.2.2 Internal Data ROMs MOTOROLA DSP96002 USERS MANUAL 9 - 7 164 9 - 8 DSP96002 USERS MANUAL MOTOROLA Figure 9-5. DSP96002 Data Memory Maps for DE=1 165 MOTOROLA DSP96002 USERS MANUAL 9 - 9 Figure 9-6. DSP96002 Memory Maps - Summary MOTOROLA DSP96002 USERS MANUAL 10 - 1 167 10.2 ON-CHIP EMULATION (OnCE 10.1 INTRODUCTION SECTION 10 ON-CHIP EMULATOR 189 APPENDIX A INSTRUCTION SET DETAILS190 Figure A-1. Addressing Mode Summary A.3 CONDITION CODE COMPUTATION A - 2 DSP96002 USERS MANUAL MOTOROLA 191 MOTOROLA DSP96002 USERS MANUAL A - 3 192 A - 4 DSP96002 USERS MANUAL MOTOROLA Figure A-3. Possible Combinations of the N, Z, I and NAN Bits for Floating-Point Results 193 MOTOROLA DSP96002 USERS MANUAL A - 5 Figure A-4. Condition Codes Computation 194 A - 6 DSP96002 USERS MANUAL MOTOROLA Figure A-4. Condition Codes Computation (continued) 195 MOTOROLA DSP96002 USERS MANUAL A - 7 Figure A-4. Condition Codes Computation (continued) 196 A - 8 DSP96002 USERS MANUAL MOTOROLA 197 MOTOROLA DSP96002 USERS MANUAL A - 9 A.4 EXCEPTION STATUS BITS COMPUTATION 198 A - 10 DSP96002 USERS MANUAL MOTOROLA 199 MOTOROLA DSP96002 USERS MANUAL A - 11 200 A - 12 DSP96002 USERS MANUAL MOTOROLAMnemonic UNCC NAN SNAN OPERR OVF UNF DZ INX Special Definitions Figure A-5. ER Exception Bits Computation 201 MOTOROLA DSP96002 USERS MANUAL A - 13 Mnemonic UNCC NAN SNAN OPERR OVF UNF DZ INX Special Definitions Figure A-5. ER Exception Bits Computation (Continued) 202 A - 14 DSP96002 USERS MANUAL MOTOROLA Figure A- 5. ER Exception Bits Computation (Continued) 203 MOTOROLA DSP96002 USERS MANUAL A - 15 205 MOTOROLA DSP96002 USERS MANUAL A - 17 Figure A-6. Instruction Description NotationAddresses Program Controller Address Generation Unit 206 A - 18 DSP96002 USERS MANUAL MOTOROLA Figure A-6. Instruction Description Notation (Continued) A.7 OPCODE DESCRIPTIONS MOTOROLA DSP96002 USERS MANUAL A - 19 207 ABS Absolute Value ABS A - 20 DSP96002 USERS MANUAL MOTOROLA 208 ADD Add ADD MOTOROLA DSP96002 USERS MANUAL A - 21 209 ADDC Add with Carry ADDCA - 22 DSP96002 USERS MANUAL MOTOROLA 210 AND Logical AND ANDMOTOROLA DSP96002 USERS MANUAL A - 23 211 ANDC Logical AND with Complement ANDCMOTOROLA DSP96002 USERS MANUAL A - 25 213 ANDI AND Immediate to Control Register ANDI215 ASL Arithmetic Shift Left ASL217 ASR Arithmetic Shift Right ASR219 Bcc Branch Conditionally Bcc221 BCHG Bit Test and Change BCHG225 BCLR Bit Test and Clear BCLR229 BFIND Find Leading One BFINDA - 42 DSP96002 USERS MANUAL MOTOROLA 230 BRA Branch Always BRAMOTOROLA DSP96002 USERS MANUAL A - 43 231 BRCLR Branch if Bit Clear BRCLR234 BRSET Branch if Bit Set BRSET237 BScc Branch to Subroutine Conditionally BScc239 BSCLR Branch to Subroutine if Bit Clear BSCLR242 BSET Bit Test and Set BSET246 BSR Branch to Subroutine BSRA - 60 DSP96002 USERS MANUAL MOTOROLA 248 BSSET Branch to Subroutine if Bit Set BSSET251 BTST Bit Test BTST254 CLR Clear an Operand CLRMOTOROLA DSP96002 USERS MANUAL A - 67 255 CMP Compare CMP257 CMPG Graphics Compare with Trivial CMPG Accept/Reject Flags259 DEBUGcc Enter Debug Mode DEBUGcc261 DEC Decrement by One DECA - 74 DSP96002 USERS MANUAL MOTOROLA 262 DO Start Hardware Loop DO267 DOR Start PC Relative Hardware Loop DOR270 ENDDO End Current DO Loop ENDDOMOTOROLA DSP96002 USERS MANUAL A - 83 271 EOR Logical Exclusive OR EORA - 84 DSP96002 USERS MANUAL MOTOROLA 272 EXT Sign Extend Half Word EXTMOTOROLA DSP96002 USERS MANUAL A - 85 273 EXTB Sign Extend Byte EXTBA - 86 DSP96002 USERS MANUAL MOTOROLA 274 FABS.S Absolute Value FABS.S276 FABS.X Absolute Value FABS.X278 FADD.S Floating-Point Add FADD.S280 FADD.X Floating-Point Add FADD.X282 FADDSUB.S Add and Subtract FADDSUB.S284 FADDSUB.X Add and Subtract FADDSUB.X286 FBcc Floating-Point Branch Conditionally FBcc289 FBScc Floating-Point Branch FBScc To Subroutine Conditionally292 FCLR Clear Floating-Point Register FCLRA - 106 DSP96002 USERS MANUAL MOTOROLA 294 FCMP Compare Two FCMP296 FCMPG Graphics Compare FCMPG with Trivial Accept/Reject Flags298 FCMPM Compare Magnitude FCMPM of Two Floating-Point Operands300 FCOPYS.S Copy Sign FCOPYS.S302 FCOPYS.X Copy Sign FCOPYS.X304 FDEBUGcc Enter Debug Mode FDEBUGcc306 FGETMAN Extract the Mantissa FGETMAN308 FINT Extract the Integer Part FINT310 FJcc Floating-Point Jump Conditionally FJcc313 FJScc Floating-Point Jump To Subroutine FJScc316 FLOAT.S Integer to Floating-Point FLOAT.S318 FLOAT.X Integer to Floating-Point FLOAT.X320 FLOATU.S Unsigned Integer to FLOATU.S322 FLOATU.X Unsigned Integer to FLOATU.XA - 136 DSP96002 USERS MANUAL MOTOROLA 324 FLOOR Extract the Integer Part FLOOR326 FMPY//FADD.S Floating-Point FMPY//FADD.S330 FMPY//FADDSUB.S FMPY//FADDSUB.S Floating-Point332 FMPY//FADDSUB.X FMPY//FADDSUB.X334 FMPY//FSUB.S Floating-Point FMPY//FSUB.S338 FMPY//FSUB.X Floating-Point FMPY//FSUB.X340 FMPY.S Floating-Point Multiply FMPY.S342 FMPY.X Floating-Point Multiply FMPY.X344 FNEG.S Negate FNEG.S348 FSCALE.S Scale FSCALE.S350 FSCALE.X Scale FSCALE.X a Floating-Point Operand352 FSEEDD Reciprocal Approximation FSEEDD354 FSEEDR Square Root FSEEDR Reciprocal Approximation356 FSUB.S Floating-Point Subtract FSUB.S358 FSUB.X Floating-Point Subtract FSUB.X360 FTFR.S Transfer Floating-Point FTFR.S Data ALU Register362 FTFR.X Transfer Floating-Point FTFR.X Data ALU Register364 FTRAPcc Conditional Software Interrupt FTRAPcc366 FTST Test a Floating-Point Operand FTST368 GETEXP Extract Exponent GETEXP370 ILLEGAL Illegal Instruction Interrupt ILLEGALMOTOROLA DSP96002 USERS MANUAL A - 183 371 INC Increment by One INCA - 184 DSP96002 USERS MANUAL MOTOROLA 372 INT Floating-Point to Integer Conversion INT374 INTRZ Floating-Point INTRZ to Integer Conversion with Round to Zero376 INTU Floating-Point INTU to Unsigned Integer Conversion378 INTURZ Floating-Point INTURZ to Unsigned Integer with Round to Zero380 Jcc Jump Conditionally Jcc382 JCLR Jump if Bit Clear JCLR385 JMP Jump JMPA - 198 DSP96002 USERS MANUAL MOTOROLA 386 JOIN Join Two 16-bit Integers JOINMOTOROLA DSP96002 USERS MANUAL A - 199 387 JOINB Join Two 8-bit Integers JOINBA - 200 DSP96002 USERS MANUAL MOTOROLA 388 JScc Jump to Subroutine Conditionally JScc390 JSCLR Jump to Subroutine if Bit Clear JSCLR393 JSET Jump if Bit Set JSET396 JSR Jump to Subroutine JSRMOTOROLA DSP96002 USERS MANUAL A - 209 397 JSSET Jump to Subroutine if Bit Set JSSET400 LEA Load Effective Address LEA403 LRA Load PC Relative Address LRA407 LSL Logical Shift Left LSL409 LSR Logical Shift Right LSR411 MOVE Move Data Registers MOVE A.7.1 PARALLEL MOVE OPERATION DESCRIPTIONS A - 224 DSP96002 USERS MANUAL MOTOROLA 412 No Parallel Data Move MOTOROLA DSP96002 USERS MANUAL A - 225 413 R Register To Register Parallel Move R415 U Move Update U (Effective Address Calculation)A - 228 DSP96002 USERS MANUAL MOTOROLA 416 X: X Memory Move X:419 X: R X Memory and Register Move X: R421 Y: Y Memory Move Y:423 Y: R Y Memory and Register Move Y: R425 L: Long Memory Move L:427 X: Y: XY Memory X: Y:430 FFcc Floating-Point iF FFccwithout CCR, ER, IER update 433 FFcc.U Floating-Point iF FFcc.Uwith CCR, ER, IER Update 436 IFcc Integer iF IFcc Conditional Instruction without CCR Update439 IFcc.U Integer iF IFcc.Uwith CCR, ER, and IER Update 442 MOVE(C) Move Control Register MOVE(C)446 MOVE(I) Immediate Short Data Move MOVE(I)449 MOVE(M) Move Program Memory MOVE(M)452 MOVE(P) Move Peripheral Data MOVE(P)457 MOVE(S) Move Absolute Short MOVE(S)463 MOVETA Move Data Registers MOVETA465 MPYS Signed Multiply MPYS467 MPYU Unsigned Multiply MPYU469 NEG Negate NEGA - 282 DSP96002 USERS MANUAL MOTOROLA 470 NEGC Negate with Carry NEGC472 NOT Logical Complement NOTMOTOROLA DSP96002 USERS MANUAL A - 285 473 OR Logical Inclusive OR ORA - 286 DSP96002 USERS MANUAL MOTOROLA 474 ORC Logical Inclusive OR with Complement ORCMOTOROLA DSP96002 USERS MANUAL A - 287 475 ORI OR Immediate to Control Register ORI477 REP Repeat Next Instruction REP480 RESET Reset Peripheral Devices RE- SETMOTOROLA DSP96002 USERS MANUAL A - 293 481 ROL Rotate Left ROLA - 294 DSP96002 USERS MANUAL MOTOROLA 482 ROR Rotate Right RORMOTOROLA DSP96002 USERS MANUAL A - 295 483 RTI Return from Interrupt RTI486 RTR Return from Subroutine with Restore RTR488 RTS Return from Subroutine RTSMOTOROLA DSP96002 USERS MANUAL A - 301 489 SETW Set Long Word Operand SETWA - 302 DSP96002 USERS MANUAL MOTOROLA 490 SPLIT Extract a 16-bit Integer SPLITMOTOROLA DSP96002 USERS MANUAL A - 303 491 SPLITB Extract an 8-bit Integer SPLITBA - 304 DSP96002 USERS MANUAL MOTOROLA 492 STOP Stop Instruction Processing STOPMOTOROLA DSP96002 USERS MANUAL A - 305 493 SUB Subtract SUBA - 306 DSP96002 USERS MANUAL MOTOROLA 494 SUBC Subtract with Carry SUBCMOTOROLA DSP96002 USERS MANUAL A - 307 495 TFR Transfer Data ALU Register TFRA - 308 DSP96002 USERS MANUAL MOTOROLA 496 TRAPcc Conditional Software Interrupt TRAPcc498 TST Test an Operand TSTMOTOROLA DSP96002 USERS MANUAL A - 311 499 WAIT Wait for Interrupt WAIT785 2 INSTRUCTION CACHE 800 3 INTEGER MODE 801 4 SINGLE PRECISION MODE 803 5 OnCE ENHANCEMENTS806 24 MOTOROLA5.4 USING THE OnCE FOR CACHE OBSERVABILITY 5.4.1 Displaying the tags, locks and LRU status 810 6 INTRODUCTION TO THE TIMER/EVENT COUNTERMOTOROLA 29 811 DSP96002Figure 6 - DSP96002 Signal Functional Groups 812 30 MOTOROLAFigure 7 - DSP96002 Pin Assignment 819 MOTOROLA 37Figure 11 - Standard Timer Mode, Internal Clock, Output Pulse Enabled (INV=0) Figure 12 - Standard Timer Mode, Internal Clock, Output Pulse Enabled (INV=1) two (CLK/2). During the clock cycle following the point where the counter reaches 0, the 821 MOTOROLA 39Figure 14 - Pulse Width Measurement Mode (INV=0) Figure 15 - Pulse Width Measurement Mode (INV=1) 823 MOTOROLA 41Figure 16 - Period Measurement Mode (INV=0) Figure 17 - Period Measurement Mode (INV=1) 824 42 MOTOROLAFigure 18 - Event Counter Mode, External Clock (INV=0) Figure 19 - Event Counter Mode, External Clock (INV=1) MOTOROLA 47 829 7 ADDITIONAL CHANGESFigure 20 - DMA Controller Programming Model - Channel 0 830 48 MOTOROLAFigure 21 - DMA Controller Programming Model - Channel 1 832 50 MOTOROLATable 4 Internal I/O Memory Map of the X Data Memory Space Table 5 Interrupt Vector Addresses 833 MOTOROLA 51Interrupt Starting Address Interrupt Source 836 APPENDIX A INSTRUCTION SET ADDENDUM DETAILS890 INDEX
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