Analog Devices AD9843A manuals
Kitchen Appliance > Microwave Oven
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Analog Devices AD9843A Manual
16 pages 160.96 Kb
aAD9843A Complete 10-Bit 20 MSPS CCD Signal Processor 2 AD9843ASPECIFICATIONSGENERAL SPECIFICATIONS(DRVDD = 2.7 V, CL = 20 pF unless otherwise noted.) DIGITAL SPECIFICATIONS(TMIN to TMAX, AVDD = DVDD = 3.0 V, fDATACLK = 20 MHz, unless otherwise noted.) 3 AD9843A(TMIN to TMAX, AVDD = DVDD = 3.0 V, fDATACLK = fSHP = fSHD = 20 MHz, unless otherwise noted.) CCD-MODE SPECIFICATIONSParameter Min Typ Max Unit Notes P 4 AD9843ASPECIFICATIONSAUX1-MODE SPECIFICATIONS(TMIN to TMAX, AVDD = DVDD = 3.0 V, fDATACLK = 20 MHz, unless otherwise noted.) AUX2-MODE SPECIFICATIONS(TMIN to TMAX, AVDD = DVDD = 3.0 V, fDATACLK = 20 MHz, unless otherwise noted.) 5 TIMING SPECIFICATIONS8 AD9843APOWER DISSIPATION mW TPC 3. Output Noise vs. VGA Gain TPC 2. Typical DNL Performance TPC 1. Power vs. Sample Rate Typical Performance Characteristics 9 AD9843ACCD-MODE AND AUX-MODE TIMING Figure 7. AUX-Mode Timing Figure 5. CCD-Mode Timing Figure 6. Typical CCD-Mode Line Clamp Timingt t t OD t SERIAL INTERFACE TIMING AND INTERNAL REGISTER DESCRIPTION Table I. Internal Register Map 10 Register Address Data Bits Name A0 A1 A2 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10Figure 10. Continuous Serial Write Operation to Multiple RegistersInternal use only, must be set to zero. **Should be set to one.SDATA SCK SL RNW TEST 0A2 0 A0 A1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 t DS t t LS t Figure 8. Serial Write OperationSDATA SCK SL RNW TEST 10 A0 A1 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 A2 Figure 9. Serial Readback OperationTable VIII. VGA Gain Register Used for AUX2-Mode 14 MSB LSB D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Gain (dB) X0 XXXXXXXXX0.0 10000000000.0111111111118.0Figure 16. System Applications Diagram Figure 14. AUX1 Circuit Configuration Figure 15. AUX2 Circuit ConfigurationCCD DIGITAL IMAGE PROCESSING ASIC TIMING GENERATOR AD9843AC02194010/00 (rev. 0) PRINTED IN U.S.A. 16 OUTLINE DIMENSIONSDimensions shown in inches and (mm). 48-Lead LQFP (ST-48)
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