Clevo D410E manuals
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126 pages 8.06 Mb
3 Notice10 Contents14 1: Introduction28 2: Disassembly62 Appendix A:Part Lists84 Appendix B:Schematic DiagramsDiagram - Page Diagram - Page Diagram - Page Table 1 B - 2 85 System Block DiagramSiS M645DXRtt 371 mBGASheet 1 of 41 System Block Diagram 702 mBGA SiS 962Socket 478 1 of 2 (71-M4000-D03) B - 3 86 Socket 478 1 of 2SW DIP-6 HREQ#3 VID[0..4] RS#1 HBPRM5# RS#0 HREQ#0 HBPM1# RS#2 Vup 36 HREQ#[0..4]5 HBPM0# 3 H_DPSLP#29,36 PM_CPUPERF#15 RS#05 RS#15 RS#25 HA#[3..31] 3,5 VCC_CORE +2.5V Sheet 2 of 41 Socket 478 1 of 2HBPRM5# 3 HBPRM4# 3 HBPM1# 3 HD#[0..63] 5 HBPRM4# HREQ#2 HREQ#1 HBPM0# HD#[0..63] HA#[3..31] HREQ#4 H_DPSLP# PM_CPUPERF# VID1 VID3 VID0 VID2 VID4 C310 INTEL P4 CPU SOCKET 478 PART 1MOBIL CPU AD25=DPSLP(H_DPSLP#) A6=GHI#(PM_CPUPERF#)Design Guide updates for P4P/845 B - 4 Socket 478 & ITP 2 of 2 (71-M4000-D03) 87 Socket 478 & ITP 2 of 2CLOSE TO ITP PORT ITP/TAP TERMINATIONCPU SIGNAL TERMINALION CLOSE TO CPU ITP/TAP TERMINATION Sheet 3 of 41 Socket 478 & ITP 2 of 2 Clock Generator (71-M4000-D03) B - 5 88 Clock GeneratorCY28352 ICS 952001 CY 28342 ICS 93722L H Clock Outputs 0.1UF 2N3904 FCM1608K121 0.01UF SMBDAT PCI-3 PCI-2 FS4 MULTISEL FS3 FS2 AGP-1 PCICLKLAN PCICLKIO FWDSDCLKO DDRCLK5 DDRCLK#57 DDRCLK57 FWDSDCLKO6 Sheet 4 of 41 Clock GeneratorBSEL0 3 BSEL1 3 CPUSTP#15,29 DDRCLK37 DDRCLK#37 DDRCLK07 DDRCLK#07 DDRCLK#27 DDRCLK27 DDRCLK47 DDRCLK#47 DDRCLK17 DDRCLK#17 SMBCLK 7,15 SMBDAT 7,15 MULTISEL DDRCLK3 DDRCLK#3 DDRCLK#5 BUFFERVCC SMBCLK SMBDAT PCICLK961 PCICLK961 PCICLK1394 PCICLKPCM PCICLKH8 ZCLK1 FS0 FS1 CPU-3 SD-1 CPU-2 CPU-4 AGP-2 CLK_VCC3 PCI-4 USB-1 CPU-1 ZIP-1 ZIP-2 PCICLKPCMPCI-1 UCLK48M SIO48M PCI-5 PCI-6 DDRCLK0 DDRCLK#0 DDRCLK#2 DDRCLK2 DDRCLK4 DDRCLK#4 DDRCLK1 DDRCLK#1 SMBCLK Main Clock GeneratorDamping Resistors Place near to the Clock Buffer (DDR)By-Pass Capacitors Place near to the Clock Buffer Frequency SelectionL L H L BSEL1 BSEL0 Function H H 14.381MHZ 48 MHZ NEAR DDR SODIMMPLEASE PLACE IN COMP SIDE AND NEAR TOGETHER FS4 FS3 FS2 FS1 FS0 0 0 0 1 1 CPU SDRAM ZCLK AGP PCI B - 6 M645DX (Host/AGP) 1 of 4 (71-M4000-D03) M645DX (Host/AGP) 1 of 4 89 M650-1Sheet 5 of 41 M650 (Host/AGP) 1 of 4 AGP HOSTM645DX (Memory for DDR) 2 of 4 (71-M4000-D03) B - 7 90 M645DX (Memory for DDR) 2 of 4M650-2 Sheet 6 of 41 M650 (Memory for DDR) 2 of 4 B - 8 M645DX (& CRT Out) 3 of 4 (71-M4000-D03) 91 M645DX (& CRT Out) 3 of 47.92mA HyperZip M650-3VGA35.4mA 6.49mA 84.8mA 7.57mA 18.07mA Sheet 7 of 41 M650 & CRT Out 3 of 4 M645DX (Power) 4 of 4 (71-M4000-D03) B - 9 92 M645DX (Power) 4 of 4SiS_AGP1.5/3.3 +1.8VS +3VS +1.8VS M650-4+3VS SiS_AGP1.5/3.3 10UF/10V Power Sheet 8 of 41 M650 (Power) 4 of 4 B - 10 DDR Memory DIMM (71-M4000-D03) 93 DDR Memory DIMMNEAR M650 addr =1010001b addr =1010000b DDR SO-DIMM_H /RCS#1 VDDSPD /RMD13 /RMD14 /RMD45 /RMD52 /RMD58 /RMD62 /RMD22 /RMD43 /RMD49 /RMD56 /RMD16 /RDQS2 CKE2 CKE3 /RMD11 /RMD31 /RMD46 /RSCAS# /RMA8 /RMD7 /RMD9 /RMD23 /RMD39 /RMD50 /RMD38 /RMD57 /RMD8 /RMD15 /RMD26 /RMD37 /RMA12 /RMD44 /RMD48 /RMD61 /RSRAS# DDRCLK3 /RMD24 /RMD34 /RMD41 /RMD47 /RDQS3 /RDQS7 DDRCLK#3 /RMD25 /RMD28 /RMD42 DDRCLK#4 DDRCLK#5 /RMD20 DDRCLK4 /RMD36 /RMD53 /RMD60 /RDQS6 /RMA5 /RMD29 /RMD35 /RMD54 DDRST /RDQM6 /RDQS0 DDRCLK5 /RDQM7 /RCS#2 /RMD5 /RMD19 /RMD55 /RDQM[0..7] DDRCLK#[0..5] /RDQS[0..7] /RMA13 DDRCLK#1 DDRCLK#2 DDRCLK0 DDRCLK1 /RDQS2 /RDQM6 /RMA10 CKE0 CKE1 /RDQS0 /RDQS3 DDRCLK#0 /RMA11 /RCS#0 DDRCLK2 /RMA12 /RDQM1 /RDQM0 /RDQS5 /RDQS7 /RDQM2 /RSRAS#6,8 /RSWE#6,8 /RSCAS#6,8 /RMD[0..63]6,8 DDRCLK#[0..5]4 /RCS#[0..5]6,8 VDDSPD DDRCLK[0..5]4 /RDQM[0..7]6,8 /RMA[0..14]6,8 /RDQS[0..7]6,8 CKE[0..5]6 SMBCLK4,15 SMBDAT4,15 /RDQM3 /RDQM4 /RMA7 /RMA14 /RMA3 /RMA0 /RMA1 /RMA9 /RDQS6 /RMA6 /RDQM5 /RDQM7 /RMA2 /RMA8 /RMA5 /RDQS1 /RDQS4 /RMA4 /RMD[0..63] CKE[0..5] DDRCLK[0..5] /RCS#[0..5] CKE2 CKE5 CKE4 CKE0 CKE3 /RMA[0..14] /RMD3 /RMA7 /RMA11 /RDQM0 /RMA2 /RDQM1 /RMA0 /RCS#3 /RMD51 /RMA14 /RDQM3 /RMD40 /RDQS4 /RMD21 /RDQS1 /RMA9 /RDQM5 /RMD0 /RMA4 /RMD6 /RMA6 /RDQS5 /RMD2 /RMA10 /RMA3 /RDQM2 /RMD1 /RMA1 /RDQM4 /RMD30 /RMD12 /RMA13 /RSWE# /RMD10 /RMD27 /RMD4 /RSRAS# /RSCAS# /RSWE# /RMD63 CKE1 /RMD17 /RMD18 /RMD32 /RMD33 DIMM DECOUPLINGDDRVREF GEN. & DECOUPLING Sheet 9 of 41 DDR Memory DIMM DDR SSTL-2 Termination (71-M4000-D03) B - 11 94 DDR SSTL-2 TerminationSSTL-2 Termination Resistors Sheet 10 of 41 DDR SSTL-2 Termination B - 12 LVDS Interface (SiS302LV) (71-M4000-D03) 95 LVDS Interface (SiS302LV)Sheet 11 of 41 LVDS interface (SiS302LV) Panel Con & LED Indicator (71-M4000-D03) B - 13 96 Panel Con & LED IndicatorSheet 12 of 41 Panel Con & LED Indicator B - 14 962 (PCI/IDE/HyperZip) 1 of 4 (71-M4000-D03) 962 (PCI/IDE/HyperZip) 1 of 4Sheet 13 of 41 962 (PCI/IDE/ HyperZip) 1 of 4 HyperZip PCI 97 Analog Power supplies of Transzip function for 96X Chip. IDE 962-1962 (Misc Signals) 2 of 4 (71-M4000-D03) B - 15 98 962 (Misc Signals) 2 of 4PCBEEP( LPC addr mapping) GPIO Sheet 14 of 41 962 (Misc Signals) 2 of 4CPU_S APIC LPC RTC MII AC97 GPIO ACPI /others KBC 962-2FROM H8 It will change next verison B - 16 962 (USB I/F) 3 of 4 (71-M4000-D03) 99 962 (USB I/F) 3 of 420 mil 20 mil Sheet 15 of 41 962 (USB I/F) 3 of 4 962 (Power & RTC) 4 of 4 (71-M4000-D03) B - 17 100 962 (Power & RTC) 4 of 4PowerBATOK 15 Sheet 16 of 41 962 (Power & RTC) 4 of 4 962 -4Put under 96X solder sideplease put J5 on component side Decoupling Capacitor Place close to 96X B - 18 HDD/Combo Connector (71-M4000-D03) 101 HDD/Combo ConnectorNear To The Connector Sheet 17 of 41 HDD/Combo Connector USB Port (71-M4000-D03) B - 19 102 USB PortSheet 18 of 41 USB PortPlace these components near to SiS96X Place these components near to SiS96X B - 20 PCMCIA ENE CB1410 (71-M4000-D03) 103 PCMCIA ENE CB1410PCI1410 ENE14100.1UF B_CE2# B_CE1# STOP# PERR# C/BE#1 AD6 AD11 IRDY# PME#AD16 C/BE#0 AD5 PCICLKPCM AD0 C/BE#[0..3]TRDY# FRAME# AD10 AD7 B_VS1 B_VS2 B_WAIT# B_CD2# B_IORD# B_RDYBY# B_CE2# 20 B_CA11 20 B_CD2# 20 B_VS2 20 B_BVD1# 20 B_RESET20 Sheet 19 of 41 PCMCIA TI1410AD[0..31]13,20,25 PME#22,23,24,25 HWSUS_CB#15 INTC#13 SERIRQ15,22,24 SPKROUT29 VPPD020 VPPD120 VCCD0#20 VCCD1#20 B_INPACK20 B_CA22 20 B_CA23 20 B_WP# 20 B_RDYBY# 20 B_WAIT# 20 B_BVD2# 20 B_CA19 20 B_CA20 20 B_CA21 20 B_CA14 20 B_CD1# 20 B_VS1 20 AD2313,25 B_CE1# 20 B_CA10 20 B_OE# 20B_INPACK B_IOWR# B_RESET B_WP# B_BVD1# B_CD1# B_WE# B_REG# B_BVD2# AD28 AD30 AD27 DEVSEL# SERR# AD4 AD2 AD19 AD18 AD[0..31] AD9 AD23 AD8 AD1 AD31 AD20 AD21 AD13 C/BE#2 AD17 AD3 REQ0# AD26 PAR GNT0# AD29 AD25 AD24 AD15 AD14 AD12 AD22 C/BE#3 HWSUS_CB# PCMCIA Power (71-M4000-D03) B - 21 104 PCMCIA PowerDebug PortMDC CON B_OE# B_CE2# AC_SDIN1 AC_RST# AC_BCLK B_CD2# B_VS2 B_OE# 19 B_CE2# 19 B_CD1# 19 B_VS2 19 PCLK_80P4 FRAME# 13,19,25 AC_SDIN1 15,26 AC_BCLK 15,26 AC_SDOUT15,26 AC_RST#15,26 Sheet 20 of 41 PCMCIA PowerVCCD0# 19 VCCD1# 19 VPPD0 19 VPPD1 19 B_WP# 19 B_RDYBY# 19 B_WAIT# 19 B_BVD2# 19 B_BVD1# 19 B_CA19 19 B_CA14 19 B_CA20 19 B_CA21 19 B_CD2# 19 B_VS1 19 B_INPACK19 B_RESET19 B_CA2219 B_CA2319 PHONE 26 AC_SYNC 15,26 AD[0..31]13,19,25 C/BE#[0..3]13,19,25 IRDY# 13,19,25 TRDY# 13,19,25 PCIRST#9,10,13,14,22,24,30 B_CA10 19 B_CA11 19 B_CE1# 19 VCCD0# VCCD1# VPPD0 VPPD1 B_WP# B_RDYBY# B_WAIT# B_BVD1# B_BVD2# B_CA19 B_CA20 B_CA14 B_CA21 B_INPACK B_RESET B_CA22 B_CA23 B_CD1# B_VS1 PHONE AC_SYNC AC_SDOUT B_CA10 B_CA11 B_CE1# B - 22 1394 PHY TSB41LV01 (71-M4000-D03) 105 1394 PHY TSB41LV01.. .. R166 220 PHY_REQ PHY_LKON PHY_LPS TPBIAS1 TPA1- TPA1+ PHY_D4 PHY_D5 Sheet 21 of 41 1394 PHY TSB41LV01PHY_D016 PHY_D116 PHY_D216 PHY_D316 PHY_D416 PHY_D516 PHY_D616 PHY_D716 PHY_CTL016 PHY_CTL116 PHY_CLK16 PHY_REQ16 PHY_LKON16 PHY_LPS16 PHY_D3 PHY_D1 PHY_D7 PHY_D2 PHY_D0 PHY_D6PHYISO# BLM21P221SGPTM00-03(R) BLM21P221SGPTM00-03 LPC Super I/O (71-M4000-D03) B - 23 106 LPC Super I/OPC87393 Sheet 22 of 41 LPC Super I/O B - 24 LPT/COM Port (71-M4000-D03) 107 LPT/COM PortPD0 PPERR# PD7 PD3 PD2 PD5 PD4 DSRA# SINA PACK# PATFD# PBUSY PATFD# PD0 PD1 PSLIN# COM1RI PD[0..7]22 PPERR#22 DTRA22 RTSA#22 DSRA#22 Sheet 23 of 41 LPT/COM PortCTSA#22 DCDA#22 SOUTA22 SINA22 RIA#22 PACK#22 PBUSY22 PPE22 PSLCT22 PSTB#22 PATFD#22 PSLIN#22 PME# 19,22,24,25 PINIT#22 COM1RI PPERR# PSTB# PACK# PPE PSLCT PBUSY PSTB# PPE PSLCT RTSA# DTRA RIA# CTSA# SOUTA DCDA# PD7 PD6 PSLIN# PINIT# PME# PD2 PD5 PD[0..7] PD4 PD6 PD1 PINIT# LPC H8 (71-M4000-D03) B - 25 108 LPC H8C.IR Sheet 24 of 41 LPC H8 B - 26 LAN RTL8100BL (71-M4000-D03) 109 LAN RTL8100BLThe maximum voltage drop when on should be less than 0.3V RTL8100BLDEVSEL# IRDY#13,19,20 PME# 19,22,23,24 C/BE#[0..3]13,19,20 AD[0..31]13,19,20 FRAME# REQ2# GNT2# RING TIP *For RTL8100C application, all bead must be rated 300mA/100ohm@100Mhz for EMI supressionEMI supression can be changed to 33 ohm Sheet 25 of 41 LAN RTL8100BL Audio Codec ALC201A (71-M4000-D03) B - 27 110 Audio Codec ALC201AAGND:25,26,27,28,29,30,31,32,33 For headphone application, ALC201AMUTE HP_SENSE L_OUT+ R_OUT+ R_OUT- MUTEOUT SPDIF CDGND LBP29 LINE-R17 LINE-L17 PWRGD 9,15,29 HP_SENSE27 R_OUT+ 27 CDGND14 AGND AGND AGND AGND AGND Sheet 26 of 41 Audio Codec ALC201AAGND AGNDAC_RST#15,20 AC_BCLK15,20 AC_SYNC15,20AC_SDOUT15,20 AC_SDIN015 PHONE20 CD-L14 CD-R14 MIC127 Vrefout 27 SPDIF 27 L_OUT+27 AC_SDIN115,20 AC_SDIN0 AC_SDIN1 AC_BCLK AMP_MUTE AMP_MUTE PWRGD L_OUT- For some crystal, the bias resistor is needed B - 28 Audio Out & Off Board Connectors (71-M4000-D03) 111 Audio Out & Off Board ConnectorsOFF-BOARD CON. SPEAKER OUTTP_CLK AUXOK KB-CTL0 BTPWR_EN SW_ON ALERT#3 FAN2_SEN29 FAN3_SEN24,29 EXT_GPI224 BTPWR_EN24 PWRS38 LID_SW#11 WEB0#24 WEB1#24 WEB2#24 Sheet 27 of 41 Audio Out & Off Board ConnectorsVrefout26 MIC126 HP_SENSE26 R_OUT+26 L_OUT+26 TP_DATA24 TP_CLK24 INTMIC 11 WLPWR_EN24 KB-CTL0 24 KB-CTL1 24 KB-CTL2 24 AUXOK9,15,24,28 LID_SW#11 SPDIF26 FAN4_SEN29 LCDID111,15,30 LCDID211,15,30 INTMIC TP_DATA WEB0# WEB1# WEB2# PWRS LID_SW# WLPWR_EN EXT_GPI2 KB-CTL1 KB-CTL2 FAN2_SEN FAN3_SEN SPDIF ALERT# LCDID2 LCDID1 MATRIX_ID0 MATRIX_ID1 SPDIF OUT MIC IN System Power Control (71-M4000-D03) B - 29 112 System Power ControlSLP S5 AS SIS AP NOTE 00274(A)HC08 AUXOK PSON PSON# PSON# PSON 39 AUXOK 9,15,24,27 S3AUXSW#6,13 SUSC# 24 Sheet 28 of 41 System Power ControlPSON#15,29 SUSB# 13,24 S3AUXSW# SUSB# PSON 4.7UF/25V SLP S3 B - 30 Fan Control and SpeedStep (71-M4000-D03) 113 Fan Control and SpeedStepMAIN2 FAN1UF MAX6306 74(A)HC08 FAN4_SEN FAN1-ON FAN2_SEN FAN2-ON H8_BEEP FAN2-ON H8BEEP PSON# PWRGD FAN1-ON SUSB-37,39 FAN1-ON24 LBP 26 H8BEEP24 PSON#15,28 VGATE15 FAN1-ON24 CPUSTP# 4,15 H_DPSLP# 2,36 VR_PWRGD36 PWRGD 9,15,26 PWROK24 FAN2-ON24 PCBEEP15 SPKROUT19 FAN2-ON24 H_DPSLP# CPUSTP# VGATE PM_GATEM VR_PWRGD VR_PWRGD PWRGD PWROK PM_GATEM FAN_SEN FAN3_SEN MAIN FAN DDR FAN SECOND FAN Sheet 29 of 41 Fan Control & SpeedStep Mobility M9-P (71-M4000-D03) B - 31 114 Mobility M9-PClose to Mobility M7-P Close to Mobilty M9-P ICS91719(R) AGP4X ZV PORT / EXT TMDS / GPIO / PCI/AGPAGP2XI2CCLK I2CDATA AAD22 AAD23 AAD24 AAD26 OSC1.8 AAD29/VBCTL1 AC/BE#2 AC/BE#3 XTALIN AC/BE#1 AIRDY# AD_STB0 AAD27/VBDE AAD31/BVSYNC AAD14 AAD16/VADE AAD30/BHSYNC AAD8 AAD29/VBCTL1 AAD3 AAD17/AVSYNC AAD7 AAD9 AAD13 AAD28/VBCTL0 RBF# AC/BE#[0..3]5 AAD6 AAD0 AAD5 AAD10 AAD15 AAD1 AAD2 AAD11 AAD18/AHSYNC AAD4 AREQ# APAR INTA# ASTOP# ADEVSEL# ATRDY# AFRAME# AC/BE#0 SB_STB# AD_STB#0 AD_STB#1 LCDID0 LCDID1 LCDID2 AAD12 AGNT# INTD# AD_STB1 SB_STB OSC1.8 AAD30/BHSYNC AAD31/BVSYNC AAD17/AVSYNC AAD18/AHSYNC AAD16/VADE AAD27/VBDE AGPREF AAD[0..15] AAD[19..26] SBA[0..7] AC/BE#[0..3] ST[0..2] AAD28/VBCTL0 XTALIN AAD19 AAD25 AAD20 AAD21 ROM LVDS TMDS DAC1 SSC DAC2 Sheet 30 of 41 Mobility M9-P B - 32 Mobility M9-P MEM A/B (71-M4000-D03) 115 Mobility M9-P MEM A/B0 1 1 0 A MEMORY INTERFACE B MEMORY INTERFACEDQMB#[0..7]34 MEM_MAB[0..13]34 MDB[0..63]33 DQMA#[0..7]32 MEM_MAA[0..13]32 MDA[0..63]33 MEMORY CHANNEL A M9 M9 MEMORY CHANNEL BOPTIONAL SERIES MEMVMODE[1:0] MEMORY IO VOLTAGE2.5V (DDR) 1.8V (DDR) 3.3V (SDR) 1 1 Sheet 31 of 41 Mobility M9-P MEM A/B VGA DRAM 1 of 2 (71-M4000-D03) B - 33 VGA DRAM 1 of 21 of 2Close to memory device 2/16/32 DDRDQMA#[0..7]31 MEM_MAA[0..13]31 MEM_MDA[0..63]33MEM_MDA[0..63]33 DQMA#[0..7] 31 116 CHANNEL ASheet 32 of 41 B - 34 VGA DRAM 1 of 2 - Termination (71-M4000-D03) VGA DRAM 1 of 2 - TerminationMDB[0..63]31 MDA[0..63]31 MEM_MDA[0..63]32MEM_MDB[0..63]34 117 CHANNEL ACHANNL BClose to memory device Sheet 33 of 41 VGA DRAM 1 of 2 - Termination VGA DRAM 2 of 2 (71-M4000-D03) B - 35 VGA DRAM 2 of 2Close to memory device 2/16/32 DDRDQMB#[0..7]31 MEM_MAB[0..13]31 DQMB#[0..7]31 MEM_MDB[0..63]33 MEM_MDB[0..63]33 118 CHANNL BSheet 34 of 41 VGA DRAM 2 of 2 B - 36 Mobility M9-P POW (71-M4000-D03) 119 Mobility M9-P POWTRACE AT LEAST 20 MILS 200mA 90mA 20mA CORE GND POWER I/O VDDC 4.0A VDDM 370mA 60mA 60mA 30mA 20mA 50mA 200mA 200mil Sheet 35 of 41 Mobility M9-P POW VCORE (71-M4000-D03) B - 37 120 VCOREOnly use on D400EVID0 VID3 VRON Vup2 TEST38,39 VID22 PWRGOOD_VID37 VID32 VR_PWRGD29 VID42 VID02 VID12,15 H_DPSLP#2,29 PM_DPRSLPVR15 V_ADJ15 V_ADJ Sheet 36 of 41 VCORE B - 38 DDR Power (71-M4000-D03) 121 DDR Power3A3A0.01U C(R) 10K_1% 0.01U 1.25_VREF PWRGOOD_VID36SUSB-29,39 SUSB-29,39 DD_ON#38 VCCVID1.8VS2.5V +1.8VS 2.5V +2.5V SUSB-29,39 SC1486 5A 3A Sheet 37 of 41 DDR Power System Power (71-M4000-D03) B - 39 122 System Power4A 4A 4A 4A 4A10U/25V *R DD_ON# PWSEN VIN1 DD_ONH VL V+ 12VR DD_ON24 PWRS27 Sheet 38 of 41 System PowerPWRSW#24 ACIN 24 DD_ON# 37 TEST 36,39 VL VIN1 VL DD_ONH PWSEN DD_ONH10U/25V 0.1U 10U/16V 0.1UF(0805) 0.1UF(0805)(R) 0.1A 4A B - 40 Charger (71-M4000-D03) 123 Charger2.5A2.5A1U_0805 *1U_1206 1000P *C 30P 1000P *C *0.1U ADAPTORIN INCURSEN PSON28 INCURSEN24TEST 36,38 CURSEN24 SUSB- 29,37 Sheet 39 of 41 ChargerBAT_SMCLK24 BAT_SMDATA24 BATTEMP24 CHAGEN24 BATVOLT 24 I_CHG 24 ADAPTORDC I_CHG SW Board and HotKey (71-M4000-D03) B - 41 124 SW Board and HotKeyHot keys,Power switch,key,Lid Sheet 40 of 41 SW Board and HotKey B - 42 TouchPad and Switch Board (71-M4000-D03) 125 TouchPad and Switch Board10MIL Sheet 41 of 41 TouchPad and Switch Board C.BIOS Update 126 Appendix C:Updating the FLASH ROM BIOSTo update the FLASH ROM BIOS you must:Unzip the file you have just downloaded on to a bootable floppy disk.
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