ELITE SERIES USER MANUAL

THEORY OF OPERATION

7.2.6.Addressable Latch

The addressable latch is used to store the oper— ating mode of the controller including the selected disk drive, the phase of the stepper motor, the motor enable state, and the function currently being performed.

7.2.7.Alternate Pair Select Logic

Selection of the second pair of disk drives is accomplished by detecting a write to the peripheral expansion area which normally contains ROM.

The controller will only recognize the write if its own EPROM is mapped in. This is to avoid recognition of the pair select command for a second controller card installed in the same computer.

The select information is contained in address line 0, thus (if this controller’s EPROM is switched into $C800—$CFFF) a write to $C800 will select Bank 0 (drives 1 and 2). A write to $C801 will select Bank 1 (drives 3 and 4) a condition which will be indicated by an LED.

7.2.8.Data Buffer/Internal Data Bus

The data buffer U13 (8304) is powered-on whenever a data transfer to or from the controller card occurs. The internal data bus connects the data buffer with the EPROM and the serial to parallel converter U12 (74LS323). The outputs

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