ELITE SERIES USER MANUAL | THEORY OF OPERATION |
Because of hardware constraints, data bytes must be written in 32 processor (6502) cycle loops. The following example illustrates an immediate load of the accumulator followed by a write.
Because timing is critical, different routines may be necessary depending upon how the data is to be accessed and code cannot cross memory page boundaries without an adjustment. See the following sample write program.
| LDA | #$D5 | (3 cycles) |
| JSR | WRITE9 | (6) |
| LDA | #$AA | (3) |
| JSR | WRITE9 | (6) |
WRITE9 | CLC |
| (2) |
WRITE7 | PHA |
| (3) |
| PLA |
| (4) |
WRITE | STA | $C08D,X | (5) |
| ORA | $C08C,X | (4) |
| RTS |
| (6) |
NOTE: Software that uses only the commands of the Apple controller will work with the Elite Controller Card.
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