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Cypress CY7C1347G manual Switching Waveforms, Read Cycle Timing16, + Feedback

Models: CY7C1347G

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CY7C1347G

Switching Waveforms

Figure 5. Read Cycle Timing[16]

tCYC

CLK

tCH

tADS tADH

ADSP

ADSC

tAS tAH

tCL

tADS tADH

ADDRESS

GW, BWE,

BW [A:D]

tCES tCEH

	A2	A3
	tWES tWEH	Burst continued with
	tWES tWEH	new base address
		new base address
		Deselect
		cycle

tADVS tADVH

ADV

tOEHZ

		tCLZ
Data Out (Q)	High-Z	Q(A1)
		tCO
		Single READ

ADV suspends burst.

tOEV	tCO
tOELZ	tDOH					tCHZ
	Q(A2)	Q(A2 + 1)	Q(A2 + 2)	Q(A2 + 3)	Q(A2)	Q(A2 + 1)
					Burst wraps around
			BURST READ		to its	initial state
			BURST READ
	DON’T CARE		UNDEFINED

Note

16. In this diagram, when CE is LOW, CE1 is LOW, CE2 is HIGH, and CE3 is LOW. When CE is HIGH, CE1 is HIGH, CE2 is LOW, or CE3 is HIGH.

Document #: 38-05516 Rev. *F

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Cypress CY7C1347G manual Switching Waveforms, Read Cycle Timing16, + Feedback

Contents

Features CY7C1347GSelection Guide Functional Description1Block Diagram CY7C1347G+ Feedback ADDRESSPinouts CY7C1347GCY7C1347G + FeedbackCY7C1347G CY7C1347G Table 1. Pin DefinitionsName DescriptionSingle Read Accesses Single Write Accesses Initiated by ADSPSingle Write Accesses Initiated by ADSC Functional OverviewCY7C1347G 2. X = “Do Not Care.” H = Logic HIGH, L = Logic LOWCY7C1347G Table 5. Truth Table 2, 3, 4, 5Electrical Characteristics Maximum RatingsOperating Range TemperatureElectrical Characteristics continued CapacitanceThermal Resistance AC Test Loads and WaveformsSwitching Characteristics CY7C1347GSwitching Waveforms CY7C1347GFigure 5. Read Cycle Timing16 + FeedbackSwitching Waveforms continued CY7C1347GFigure 6. Write Cycle Timing16 + FeedbackSwitching Waveforms continued CY7C1347GFigure 7. Read/Write Cycle Timing16, 18 Page 14 ofSwitching Waveforms continued 21. DQs are in high-Z when exiting ZZ sleep modeCY7C1347G + FeedbackOrdering Information CY7C1347GDiagram CY7C1347GOrdering Information continued SpeedPackage Diagrams CY7C1347GFigure 9. 100-Pin Thin Plastic Quad Flatpack 14 x 20 x 1.4 mm + FeedbackPackage Diagrams continued CY7C1347GFigure 10. 119-Ball BGA 14 x 22 x 2.4 mm + FeedbackPackage Diagrams continued PACKAGE WEIGHT 0.475gCY7C1347G Figure 11. 165-Ball FBGA 13 x 15 x 1.4 mmDocument History Page CY7C1347GDocument Title CY7C1347G 4-Mbit 128K x 36 Pipelined Sync SRAM Document NumberSales, Solutions, and Legal Information PSoC SolutionsWorldwide Sales and Design Support Products