6EPSON S1C88650 TECHNICAL MANUAL
1 INTRODUCTION
5 I/O PORT PULL UP RESISTOR
• P00 ......... 1. With Resistor 2. Gate Direct
• P01 ......... 1. With Resistor 2. Gate Direct
• P02 ......... 1. With Resistor 2. Gate Direct
• P03 ......... 1. With Resistor 2. Gate Direct
• P04 ......... 1. With Resistor 2. Gate Direct
• P05 ......... 1. With Resistor 2. Gate Direct
• P06 ......... 1. With Resistor 2. Gate Direct
• P07 ......... 1. With Resistor 2. Gate Direct
• P10 ......... 1. With Resistor 2. Gate Direct
• P11 ......... 1. With Resistor 2. Gate Direct
• P12 ......... 1. With Resistor 2. Gate Direct
• P13 ......... 1. With Resistor 2. Gate Direct
• P14 ......... 1. With Resistor 2. Gate Direct
• P15 ......... 1. With Resistor 2. Gate Direct
• P16 ......... 1. With Resistor 2. Gate Direct
• P17 ......... 1. With Resistor 2. Gate Direct
6 INPUT PORT INPUT I/F LEVEL
• K00......... 1. CMOS Level 2. CMOS Schmitt
• K01......... 1. CMOS Level 2. CMOS Schmitt
• K02......... 1. CMOS Level 2. CMOS Schmitt
• K03......... 1. CMOS Level 2. CMOS Schmitt
• K04......... 1. CMOS Level 2. CMOS Schmitt
• K05......... 1. CMOS Level 2. CMOS Schmitt
• K06......... 1. CMOS Level 2. CMOS Schmitt
• K07......... 1. CMOS Level 2. CMOS Schmitt
7 I/O PORT INPUT I/F LEVEL
• P10 ......... 1. CMOS Level 2. CMOS Schmitt
• P11 ......... 1. CMOS Level 2. CMOS Schmitt
• P12 ......... 1. CMOS Level 2. CMOS Schmitt
• P13 ......... 1. CMOS Level 2. CMOS Schmitt
• P14 ......... 1. CMOS Level 2. CMOS Schmitt
• P15 ......... 1. CMOS Level 2. CMOS Schmitt
• P16 ......... 1. CMOS Level 2. CMOS Schmitt
• P17 ......... 1. CMOS Level 2. CMOS Schmitt
8 ______
WATCHDOG TIMER NMI GENERATION CYCLE
1. 32768/fOSC1
(0.75–1-sec cycle when f
OSC1
= 32 kHz)
2. 65536/fOSC1
(1.5–2-sec cycle when fOSC1 = 32 kHz)
3. 131072/fOSC1
(3–4-sec cycle when fOSC1 = 32 kHz)
4. 262144/fOSC1
(6–8-sec cycle when fOSC1 = 32 kHz)
This mask option can select whether the pull-up resistor
for the I/O port terminal (it works during input mode) is
used or not. It is possible to select for each bit of the I/O
ports. Refer to Section 5.7, "I/O Ports (P ports)", for
details.
This mask option can select the interface level of the
input (K) port from either the CMOS level or CMOS
Schmitt level. It is possible to select for each bit of the
input ports. Refer to Section 5.5, "Input Ports (K ports)",
for details.
The input port on the ICE (with the Peripheral Circuit
Board installed) is fixed to the CMOS level interface
regardless of this option selection.
This mask option can select the interface level of the I/O
(P) port from either the CMOS level or CMOS Schmitt
level. It is possible to select for each bit of the I/O ports.
Refer to Section 5.7, "I/O Ports (P ports)", for details.
The input port on the ICE (with the Peripheral Circuit
Board installed) is fixed to the CMOS level interface
regardless of this option selection.
______
This mask option can select the NMI generation cycle of
the watchdog timer. Refer to Section 5.3.1, "Configuration
of watchdog timer", for details.