Fujitsu F2MCTM-16LX - page 401

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CHAPTER 20 LIN-UART
■LIN-UART interrupt and EI2OS
Table 20.1-4 LIN-UART Interrupt and EI2OS
Channel Interrupt
number Interrupt control register Vector table address EI2OS
Register name Address Lower Upper Bank
LIN-UART0 reception #35(23H) ICR12 0000BCHFFFF70HFFFF71HFFFF72H*1
LIN-UART0
transmission #36(24H) ICR12 0000BCHFFFF6CHFFFF6DHFFFF6EH*2
LIN-UART1 reception #37(25H) ICR13 0000BDHFFFF68HFFFF69HFFFF6AH*1
LIN-UART1
transmission #38(26H) ICR13 0000BDHFFFF64HFFFF65HFFFF66H*2
*1: EI2OS service is usable if the other interrupt (s) which shares the ICR12 to ICRB and same interrupt vector is (are) not
enabled. Detection of receive errors is possible and stop function for EI2OS service is supported.
*2: EI2OS service is usable if the other interrupt (s) which shares the ICR12 to ICRB and same interrupt vector is (are) not
enabled.