8-bit Proprietary F2MC-8L Family Support Tools

Emulator specification for F2MC-8L

Emulator series

 

MB2140 series emulator

 

 

 

 

 

Main unit

 

Main unit : MB2141B

 

 

 

 

 

 

 

Pod

MB2144-508

 

MB2144-505

 

 

 

 

 

Target microcontroller

F2MC-8L

 

F2MC-8L

Evaluation device

 

Old

 

Yes

 

Yes

 

New

 

Yes

 

No

 

 

 

 

Operating power supply voltage of micro-

2.7 to 5.5 V

 

2.7 to 5.5 V

controller *

 

 

 

 

 

 

 

 

 

Operating frequency of microcontroller *

Internal : 32 kHz to 20 MHz

 

Internal : 32 kHz to 16 MHz

External : 8 kHz to 5 MHz

 

External : 8 kHz to 4 MHz

 

 

 

 

Debugger / OS

 

 

SOFTUNE V3 Workbench

 

SOFTUNE V3 Workbench

 

 

WindowsXP/Me/2000/98/NT4.0

 

WindowsXP/Me/2000/98/NT4.0

 

 

 

 

Simple target

 

 

Attachment (MB89T625)

 

No

 

 

 

- User’s memory area

 

Memory area

 

 

- Emulation memory area

 

 

 

 

- Undefined area

 

 

 

 

 

 

- Max 20 area

 

 

 

User's memory area

- Unrestricted of area size

 

 

 

 

- READ, WRITE : an access attribute setup is possible.

 

 

Size

64 Kbyte

 

 

 

Emulation area

 

Mapping unit

1 byte unit, 20area

 

 

 

 

 

Access attribute

READ, WRITE, GUARD, NOGUARD

 

Mirror area : It is used at on-the-fly.

It is 5 area in all about copy area of user’s memory area and emulation memory area.

 

 

 

- Continuous execution- The automatic change by sauce display

Execution control

 

 

- Step execution- 1 step execution of a sub routine and a function

 

 

- Machine language command unit- Permission/prohibition of interrupt

 

 

 

 

 

 

- C language sauce line unit- Permission/prohibition of a watch dog reset function

 

 

 

- Instruction execution break : 64 K point

 

 

 

 

- Data access break : 64 K point

 

 

 

 

- Sequential end break

 

Break

 

 

- Garded access break

 

 

 

 

- Trace buffer full break

 

 

 

 

- Performance buffer full break

 

 

 

 

- Forced break

 

 

 

 

 

 

- Single trace : 32 K cycles

 

Trace capacity

 

 

(ON/OFF of trace by the event trigger and the sequencer is possible.)

 

 

- Multi trace : 2 K blocks

 

 

 

 

 

 

 

 

(1 block is 8 cycles before and after an event trigger.)

 

 

 

- Address

 

 

 

 

 

 

- Data

 

 

 

 

 

 

- Status

 

 

 

Trace data

 

 

Access status : READ, WRITE, CODE

 

 

 

Inside status of a device : reset, a hold, and data are effective/invalid.

 

 

 

- External probe data

 

 

 

 

- The execution level of a sequencer

 

Display form oftrace data

- Machine cycle

- Instruction mnemonic

- Sauce line

 

 

The number of points

 

8

 

Event trigger con-

 

Trigger conditions

- The AND conditions of address, data, external probe and status.

 

- All conditions can be specified of don’t care per 1 bit.

dition setup

 

 

 

Sequential level

 

8

 

 

 

 

 

 

 

Trigger path

 

Max 16M time

 

 

 

 

 

 

 

(Continued)

F2MC-8LFamily

Support tools

 

 

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