cmpi
Compare Immediate
Preliminary PPC440x5 CPU Core User’s Manual
instrset.fm.
September 12, 2002 Page 283 of 589
cmpi
Compare Immediate
c0:3 ←40
if (RA) < EXTS(IM) then c0←1
if (RA) > EXTS(IM) then c1←1
if (RA) = EXTS(IM) then c2←1
c3←XER[SO]
n← BF
CR[CRn] ←c0:3
The IM field is sign-extended to 32 bits. The contents of register RAare compared with the extended IM field,
using a 32-bit signed compare.
The CR field specified by the BF field is updated to reflect the results of the compare and the value of
XER[SO] is placed into the same CR field.
Registers Altered
• CR[CRn] where n is specified by the BF field
Invalid Instruction Forms
• Reser ved fields
Programming Note
PowerPCBook-E Architecture defines this instruction as cmpi BF,L,RA,IM, where L selects operand size for
64-bit implementations. For all 32-bit implementations, L =0 is required (L =1 is an invalid form); hence for
the PPC440x5 core, use of the extended mnemonic cmpwi BF,RA,IM is recommended.
cmpi BF, 0, RA, IM
11 BF RA IM
0691116 31
Table9-12. Extended Mnemonics for cmpi
Mnemonic Operands Function Other Registers
Altered
cmpwi [BF,] RA, IM
Compare Word Immediate.
Use CR0 if BF is omitted.
Extended mnemonic for
cmpi BF,0,RA,IM