IBM PPC440X5 - page 527

User’s Manual
Preliminary PPC440x5 CPU Core
instalfa.fm.
September 12, 2002 Page 527 of 589
bclr BO, BI
Branch conditional to address in LR.
Using (LR) at entry to instruction,
NIA ←LR0:29 || 20
CTR if BO2 = 0
278
bclrl CTR if BO2 = 0
(LR) ←CIA+ 4
bctr Branch unconditionally to address in CTR.
Extended mnemonic for
bcctr 20,0 275
bctrl Extended mnemonic for
bcctrl 20,0 (LR) ←CIA+ 4
bdnz
target
Decrement CTR.
Branch if CTR≠0
Extended mnemonic for
bc 16,0,target
269
bdnza Extended mnemonic for
bca 16,0,target
bdnzl Extended mnemonic for
bcl 16,0,target (LR) ←CIA+ 4
bdnzla Extended mnemonic for
bcla 16,0,target (LR) ←CIA+ 4
bdnzlr
Decrement CTR.
Branch if CTR≠0 to address in LR.
Extended mnemonic for
bclr 16,0 278
bdnzlrl Extended mnemonic for
bclrl 16,0 (LR) ←CIA+ 4
bdnzf
cr_bit, target
Decrement CTR.
Branch if CTR≠0 AND CRcr_bit =0
Extended mnemonic for
bc 0,cr_bit,target
269
bdnzfa Extended mnemonic for
bca 0,cr_bit,target
bdnzfl Extended mnemonic for
bcl 0,cr_bit,target (LR) ←CIA+ 4
bdnzfla Extended mnemonic for
bcla 0,cr_bit,target (LR) ←CIA+ 4
bdnzflr
cr_bit
Decrement CTR.
Branch if CTR≠0 AND CRcr_bit = 0 to address in LR.
Extended mnemonic for
bclr 0,cr_bit 278
bdnzflrl Extended mnemonic for
bclrl 0,cr_bit (LR) ←CIA+ 4
TableA-1. PPC440x5 Instruction Syntax Summary (continued)
Mnemonic Operands Function Other Registers
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