Intel 210200-002 manual 8284A

HARDWARE DESIGN

	8284A			8284A
	f	AEN1	SYSTEM----2. AEN1
			READY
SYSTEM	4	RDY1		4	RDY1
READY
	7	AEN2		7
	~ RDY2				AEN2
1K					RDY2
			1K	(
+5	-=-		+5	-=-

Figure 3-21. Using RDYlIRDY2 to Generate READY Figure 3-22. Using AEN1/AEN2 to Generate READY

74125	+5
.....
l-~
:----'	1KQ
......	......	J
J]
	74LS04
		74lS734
		>CK

ClK '"v

I

K0 - RDYTO 8284A

ClR

AlE-t>

Figure 3-23. Single Wait State Generator

3-19