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| DS87C530/DS83C530 EPROM/ROM Microcontrollers with |
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| DATA SHEET REVISION SUMMARY |
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| REVISION |
| DESCRIPTION |
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| 070505 | 1) | Added |
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| 2) | Deleted the “A” from the IPC/JEDEC |
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| 3) | Removed “Preliminary” status. |
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| 4) | Soldering temperature parameter now references JEDEC specification. |
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| 5) | Added note to absolute maximums clarifying voltages referenced to ground and storage temperature. |
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| 040104 | 6) | Updated ICC, IIDLE, ISTOP, ISPBG, IIL, and ITL to incorporate errata conditions. |
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| 7) | Added note clarifying DC electrical test conditions. |
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| 8) | Added note clarifying VOH3 specification applies to first clock cycle following the transition. |
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| 9) | Updated AC and MOVX electrical characteristics with final characterization values. |
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| 10) Added tAVLL2 specification and corrected MOVX timing diagrams to show tAVLL2 instead of tAVLL. |
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| 11) Updated IBAT to incorporate errata conditions. |
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| 112299 | Contact factory for details. |
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| 1) | Added DS83C530 to data sheet. |
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| 2) | Updated PMM operating current estimates. |
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| 3) | Added note to clarify IIL specification. |
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| 070798 | 4) | Added note to prevent accidental corruption of Watchdog Timer count while changing counter length. |
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| 5) | Changed IBAT specification to 1A over extended temperature range. |
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| 6) | Changed minimum oscillator frequency to 1MHz when using external crystal. |
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| 7) | Changed RST pulldown resistance from 170kto 200kmaximum. |
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| 8) | Corrected “Data memory write with stretch” diagrams to show falling edge of ALE coincident with |
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| rising edge of C3 clock. |
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| 1) | Updated ALE pin description. |
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| 2) | Added note pertaining to erasure window. |
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| 022097 | 3) | Added note pertaining to internal MOVX SRAM. |
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| 4) | Changed Note 6 from RST=5.5V to RST=VCC. |
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| 5) | Changed Note 10 from RST=5.5V to RST=VCC. |
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| 6) | Changed serial port mode 0 timing diagram label from tQVXL to tQVXH. |
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| 7) | Added information pertaining to |
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| 060895 | Initial release. |
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