National Instruments PCI-1200 Timing Specifications

Chapter 3 Signal Connections

© National Instruments Corporation 3-27 PCI-1200 User Manual

Timing Specifications

Use the handshaking lines STB* and IBF to synchronize input transfers.

Use the handshaking lines OBF* and ACK* to synchronize output

transfers.

The following signals are used in the mode timing diagrams:

Table 3-6. Signal Names Used in Timing Diagrams

Name Type Description

STB* Input Strobe Input—A low signal on this handshaking line loads data into the

input latch.

IBF Output Input Buffer Full—A high signal on this handshaking line indicates that

data has been loaded into the input latch. This is primarily an input

acknowledge signal.

ACK* Input Acknowledge Input—A low signal on this handshaking line indicates

that the data written from the specified port has been accepted. This

signal is primarily a response from the external device that it has

received the data from the PCI-1200.

OBF* Output Output Buffer Full—A low signal on this handshaking line indicates

that data has been written from the specified port.

INTR Output Interrupt Request—This signal becomes high when the 82C55A is

requesting service during a data transfer. Set the appropriate interrupt

enable signals to generate this signal.

RD* Internal Read Signal—This signal is the read signal generated from the PCI

interface circuitry.

WRT* Internal Write Signal—This signal is the write signal generated from the PCI

interface circuitry.

DATA Bidirectional Data Lines at the Specified Port—This signal indicates when the data

on the data lines at a specified port is or should be available.

Contents

Main Page Important Information Warranty Copyright Trademarks WARNING REGARDING MEDICAL AND CLINICAL USE OF NATIONAL INSTRUMENTS PRODUCTS Contents Chapter 4 Theory of Operation Page Tables About This Manual Organization of This Manual Conventions Used in This Manual National Instruments Documentation Related Documentation Customer Communication Introduction About the PCI-1200 What You Need to Get Started Unpacking Software Programming Choices National Instruments Application Software NI-DAQ Driver Software Register-Level Programming Optional Equipment Custom Cabling Page Installation and Configuration Software Installation Hardware Installation Board Configuration Analog I/O Configuration Analog Output Polarity Analog Input Polarity Analog Input Mode RSE Input (Eight Channels, Reset Condition) NRSE Input (Eight Channels) DIFF Input (Four Channels) Signal Connections I/O Connector Figure 3-1. PCI-1200 I/O Connector Pin Assignments Signal Connection Descriptions Page Page Analog Input Signal Connections Page Types of Signal Sources Floating Signal Sources Ground-Referenced Signal Sources Input Configurations Chapter 3 Signal Connections Table 3-4. Summary of Analog Input Connections Differential Connection Considerations (DIFF Configuration) Differential Connections for Grounded Signal Sources Figure 3-3. Differential Input Connections for G rounded Signal Sources Differential Connections for Floating Signal Sources Figure 3-4. Differential Input Connections for Floating Sources Single-Ended Connection Considerations Single-Ended Connections for Floating Signal Sources (RSE Configuration) Single-Ended Connections for Grounded Signal Sources (NRSE Configuration) Common-Mode Signal Rejection Considerations Analog Output Signal Connections Digital I/O Signal Connections Logical Inputs and Outputs Port C Pin Connections Power Connections DAQ and General Purpose Timing Signal Connections DAQ Timing Connections Page Page Page General Purpose Timing Signal Connections Page Page Chapter 3 Signal Connections PCI-1200 User Manual 3-26 National Instruments Corporation Figure 3-16. General Purpose Timing Signals The GATE and OUT signals in Figure3-16 are referenced to the rising edge of the CLK signal. Timing Specifications Mode 1 Input Timing Mode 1 Output Timing Mode 2 Bidirectional Timing National Instruments Corporation 4-1 PCI-1200 User Manual Theory of Operation This chapter explains the operation of each functional unit of the PCI-1200. Functional Overview The block diagram in Figure4-1 shows a functional overview of the PCI-1200 board. Figure 4-1. PCI-1200 Block Diagram PCI Interface Circuitry Timing Chapter 4 Theory of Operation PCI-1200 User Manual 4-4 National Instruments Corporation Figure 4-3. Timing Circuitry Chapter 4 Theory of Operation National Instruments Corporation 4-5 PCI-1200 User Manual Analog Input Figure 4-4. Analog Input Circuitry Analog Input Circuitry DAQ Operations Controlled Acquisition Mode Freerun Acquisition Mode Interval Scanning Acquisition Mode Single-Channel Data Acquisition Multichannel Scanned Data Acquisition DAQ Rates Analog Output Analog Output Circuitry DAC Timing Digital I/O Page Calibration Calibration at Higher Gains Calibration Equipment Requirements Using the Calibration Function A Specifications Analog Input Input Characteristics Transfer Characteristics Amplifier Characteristics Dynamic Characteristics Stability Explanation of Analog Input Specifications Explanation of Dither Explanation of DAQ Rates Analog Output Output Characteristics Transfer Characteristics Voltage Output Dynamic Characteristics Stability Explanation of Analog Output Specifications Digital I/O Timing I/O Page B Customer Communication Electronic Services Bulletin Board Support FTP Support Fax-on-Demand Support Telephone and Fax Support Country Telephone Fax Technical Support Form Page PCI-1200 Hardware and Software Configuration Form National Instruments Products Other Products Page Documentation Comment Form Title: Edition Date: Part Number: Mail to: Technical Publications Fax to: Technical Publications Glossary Numbers/Symbols A C D E Page L M N O P R S T V W Index A B C D E F G I L M N O R S T U V W