100
µ
PD17062
10.5.4 HSYNC Counter Data Register
Fig. 10.7 shows how the HSYNC counter data register functions .
The HSYNC counter data register reads the horizontal synchronizing signal count.
When the HSYNC counter data register reaches 3FH, it returns to 00H at the next input.
Fig. 10-7 HSYNC Data Register Functions
DBF3
0CH
DBF2
0DH
DBF1
0EH
DBF0
0FH
b
15
b
14
b
13
b
12
b
11
b
10
b
9
b
8
b
7
b
6
b
5
b
4
b
3
b
2
b
1
b
0
b
7
b
6
b
5
b
4
b
3
b
2
b
1
b
0
HSC 04H
00
8
Horizontal synchronizing signal count
Symbol
Peripheral
address
Peripheral hardware
Name
Peripheral register
Name Data buffer
Symbol
Address
Bit
Data Don't care Don't care Transfer data
GET
HSYNC counter
data register
Horizontal
synchronizing signal
counter
Valid data