158
µ
PD17062
13.4.3 Halt Release by Key Entry
The HALT 0001B instruction specifies a key entry as a halt release condition.
If this condition is specified, the halt state is released when a high level is applied to one of the P0D0/ADC2
to P0D3/ADC5 pins.
Items (1) to (3) describe cautions to be taken in using a general-purpose output port as a key source signal
and the P0D0/ADC2 to P0D3/ADC5 pins for an A/D converter.
(1) Cautions in using a general-purpose output port as a key source signal
P0D
3
/ADC
5
P0D
2
/ADC
4
P0D
1
/ADC
3
P0D
0
/ADC
2
Latch
Switch A
General-purpose output port
The HALT 0001B instruction must be executed after the general-purpose output port for key source signal
input is raised to a high.
If an alternate switch, like switch A in the above figure, is used, a high level is always applied to the P0D0/
ADC2 pin when the switch is kept closed, and causes the halt state to be released immediately.
Therefore, great care should be taken when an alternate switch is used.
The P0D0/ADC2 to P0D3/ADC5 pins are internally pulled down automatically.