CHAPTER 6 16-BIT TIMER 20
User’s Manual U15331EJ4V1UD 109
Figure 6-1. Block Diagram of 16-Bit Timer 20
CPT20/TO20
/INTP3/P33
Internal bus
Internal bus
16-bit timer mode
control register 20
(TMC20)
16-bit timer mode
control register 20
TOF20
CPT201CPT200
TOC20
TCL201TCL200
TOE20
f
X
f
X
/2
2
Edge detector
16-bit capture
register 20 (TCP20)
16-bit counter
read buffer
16-bit timer counter 20 (TM20)
16-bit compare register 20 (CR20)
Match
OVF
F/F
TOD20
TO20/CPT20
/INTP3/P33
INTTM20
P33
output latch
PM33
f
X
/2
5
Timer 61 interrupt
request signal
Selector
(1) 16-bit compare register 20 (CR20)
This 16-bit register is used to continually compare the value set to CR20 with the count value in 16-bit timer
counter 20 (TM20) and to issue an interrupt request (INTTM20) when a match occurs.
CR20 is set via a 16-bit memory manipulation instruction. Values from 0000H to FFFFH can be set.
RESET input sets this register to FFFFH.
Caution To rew rite CR20 during a count operation, first set interrupt mask flag register 0 (MK0) to
disable interrupts. Also, set inversion inhibited for the timer output data in 16-bit timer
mode control register 20 (TMC20). If CR20 is rewritten while interrupts are enabled, an
interrupt request may be issued at the point of rewrite.
(2) 16-bit timer counter 20 (TM20)
This is a 16-bit register that is used to count the count pulses.
TM20 can be read with a 16-bit memory manipulation instruction.
The counter is in free-running mode when the count clock is being input.
RESET input sets this counter to 0000H and restarts free-running mode.
Caution The count value after releasing STOP mode is undefined because the count operation
occurred during the oscillation stabilization time.
(3) 16-bit capture register 20 (TCP20)
This is a 16-bit register used to capture the contents of 16-bit timer counter 20 (TM20).
TCP20 is set with a 16-bit memory manipulation instruction.
RESET input makes this register undefined.