CHAPTER 7 8-BIT TIMERS 50, 60, AND 61
User’s Manual U15331EJ4V1UD
156
Figure 7-27. Operation Timing in PWM Output Mode (When Both Edges Are Selected)
(1) CR50 = Even number
Count clock
CR50
TCE50
INTTM50
TO50
2N
TM50 2N 00H
00H 01H FFH FFH
2N
02H FEH 01H 02H FEH
Overflow Overflow
Count start
(2) When CR50 = Odd number
Count clock
CR50
TCE50
INTTM50
TO50
2N + 1
TM50
2N + 1
00H
00H 01H FFH FFH
2N + 1
01H
01H 00H
Overflow Overflow Overflow
Count start
Caution Wh en both edges are selected, do not set CR50 to 00H, 01H, and FFH. If CR50 is set to these
values, PWM output may not be performed normally.
Remark N = 00H to FFH