CHAPTER 3 CPU ARCHITECTURE
60 User’s Manual U15331EJ4V1UD
(3) Stack pointer (SP)
This is a 16-bit register that holds the start address of the memory stack area. Only the internal high-speed
RAM area can be set as the stack area.
Figure 3-11. Stack Pointer Configuration
015
SP14SP15SP SP13 SP12 SP11 SP10 SP9 SP8 SP7 SP6 SP5 SP4 SP3 SP2 SP1 SP0
The SP is decremented ahead of write (save) to the stack memory and is incremented after read (restore)
from the stack memory.
Each stack operation saves/restores data as shown in Figures 3-12 and 3-13.
Caution Since RESET input makes the SP contents undefined, be sure to initialize the SP before
instruction execution.
Figure 3-12. Data to Be Saved to Stack Memory
Interrupt
PSW
PC15 to PC8
PC15 to PC8
PC7 to PC0
Lower
register pairs
SP SP _ 2
SP _ 2
CALL, CALLT
instructions
PUSH rp
instruction
SP _ 1
SP
SP SP _ 2
SP _ 2
SP _ 1
SP
PC7 to PC0
SP _ 3
SP _ 2
SP _ 1
SP
SP SP _ 3
Higher
register pairs
Figure 3-13. Data to Be Restored from Stack Memory
RETI instruction
PSW
PC15 to PC8
PC15 to PC8
PC7 to PC0
Lower
register pairs
RET instructionPOP rp
instruction
SP PC7 to PC0
Higher
register pairs
SP + 1
SP SP + 2
SP
SP + 1
SP SP + 2
SP
SP + 1
SP + 2
SP SP + 3