CHAPTER 8 USB FUNCTION
User’s Manual U12978EJ3V0UD 103
(4) Receive data bank
(a) Receive data PID (USBRD)
This is the receive data packet ID area. The data input to the data/handshake PID compare register
(DIDCMP) is stored here.
USBRD is read with an 8-bit memory manipulation instruction.
RESET input sets USBRD to 00H.
(b) Receive data address (USBR0 to USBR7)
This is an 8-byte register that stores the data/handshake packet transferred from the host.
USBR0 to USBR7 are read with an 8-bit memory manipulation instruction.
If the following combinations are used, they are read with a 16-bit memory manipulation instruction.
•USBR10: USBR0 and USBR1
•USBR32: USBR2 and USBR3
•USBR54: USBR4 and USBR5
•USBR76: USBR6 and USBR7
RESET input makes USBR0 to USBR7 undefined.
Figure 8-5. Configuration of Receive Data Bank
10H
07H 06H 05H 04H 03H 02H 01H 00H
11H
12H
13H
14H
15H
16H
17H
18H
USBRD
USBR0
USBR1
USBR2
USBR3
USBR4
USBR5
USBR6
USBR7
USBPOW address
USBPOB address
Symbol
ID area
Data area (8 bytes)
The operation during reception appears as follows.
8th byte
1st byte USBT00
USBT07
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SETUP DATA0
ACK
Packet from host controller
Response packet
USBT00
USBT07
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OUT DATA1
ACK
8th byte
1st byte
The data packet from the host controller is stored in the USBT00 to USBT07 registers.