CHAPTER 8 USB FUNCTION
User’s Manual U12978EJ3V0UD 111
(3) Packet receive status register (RXSTAT)
This register indicates the receive status of each packet.
Bits 0 to 2 (TOSTAT, DASTAT, and HSSTAT) are flags that indicate that a token packet, data packet, or
handshake packet is currently being received. These flags are set upon detection of a packet ID by an ID
detection buffer, and cleared upon reception of EOP.
Bits 3 to 6 (EOPRX, URESRX, SE0RX, RESMRX) are flags that detect bus status transition. These flags are
set immediately after each bus transition is detected. These flags are cleared by software but cannot be set to 1
by software.
Bit 7 (UWDERR) is set if an inadvertent program loop is detected by the USB timer. The flags are cleared by
software. UWDERR cannot be set by software. An inadvertent program loop of the USB timer means a status
in which the USB clock does not stop when EOP cannot be detected in a packet received from the host, or
when noise on the bus was detected as a bus status transition.
RXSTAT is set with an 8-bit memory manipulation instruction.
RESET input sets RXSTAT to 00H.