CHAPTER 3 CPU ARCHITECTURE
User’s Manual U12978EJ3V0UD 39
Figure 3-4. Data Memory Addressing (
µ
µµ
µ
PD78F9801)
Special function registers (SFR)
256 × 8 bits
Internal high-speed RAM
256 × 8 bits
Flash memory
16,384 × 8 bits
FFFFH
0000H
Direct addressing
Register indirect
addressing
Based addressing
FF00H
FEFFH
FF20H
FF1FH
FE20H
FE1FH
SFR addressing
Short direct
addressing
Reserved
FE00H
FDFFH
4000H
3FFFH