Extension Instruction Specifications
3-36
(e) Note on the description of memory access and multiply-and-accumulate instruction or high-speed multiplication
instruction
There is an error occasion - CPU hung-up - as written below, if High-speed multiplication instruction or Multiply-
and-accumulate instruction is executed within 2 instructions after a memory access instruction that accesses to
internal ROM, internal peripheral I/O space or external memory space (this space is referred to as "the space other
than internal RAM" below).
However, this note is not applied in either of the following 4 conditions.
1. The Extension Instruction is not used.
PanaXSeries C compiler outputs High-speed multiplication instruction only if you use compiler option
(-mmulq). If you don't use that option, PanaXSeries C compiler never outputs Extension Instruction.
2. Only High-speed multiplication instructions are used in Extension Instructions.
3. Only Multiply-and-accumulate instructions are used in Extension Instructions.
4. Only the other extension instructions are used in Extension Instructions.
♦In this note, "Extension Instructions" are classified into Multiply-and-accumulate instructions, High-speed
multiplication instructions and the other extension instructions.
There is an error occasion - CPU hung-up -, when "error actualizing condition" occurs after generating "error
making potential condition".
"Error making potential condition" and "Error actualizing condition" are described in details below. An "interrupt"
on this note is defined as one of level interrupts or non-maskable interrupts*.
* When ICE is used, there is error occasion as in the case of level interrupts and non-maskable interrupts.
<Error making potential condition>
Error making potential condition occurs when an interrupt is requested during instruction decoding of High-speed
multiplication instruction or Multiply-and-accumulate instruction executed after a memory access instruction that
accesses to the space other than internal RAM. Error making potential conditions are classified into the following
12 cases.
Memory access instruction accesses to
the space other than internal RAM
High-speed multiplication instruction
or Multiply-and-accumulate instruction
The interrupt occurrence
Case 1:
Instruction flow
Memory access instruction accesses to
the space other than internal RAM
An 1-cycle executing instruction
High-speed multiplication instruction
or Multiply-and-accumulate instruction
The case where the High-speed multiplication instruction
uses 32-bit immediate value is excluded.
The interrupt occurrence
Case 2:
Instruction flow