Parameter Instruction code
Function
Number of
cycles
Number of
words
Mnemonic
Type of
instructions D9D8D7D6D5D4D3D2D1D0Hexadecimal
notation
1-82
HARDWARE
4513/4514 Group User’s Manual
MACHINE INSTRUCTIONS
MACHINE INSTRUCTIONS (continued)
TABSI
TSIAB
TAJ1
TJ1A
SST
SNZSI
TABAD
TALA
TAD AB
TAQ 1
TQ1A
ADST
SNZAD
TAQ 2
TQ2A
NOP
POF
EPOF
SNZP
WRST
TAMR
TMRA
TAQ 3
TQ3A
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
278
238
242
202
29E
288
279
249
239
244
204
29F
287
245
205
000
002
05B
003
2A0
252
216
246
206
1001111000
1000111000
1001000010
1000000010
1010011110
1010001000
1001111001
1001001001
1000111001
1001000100
1000000100
1010011111
1010000111
1001000101
1000000101
0000000000
0000000010
0001011011
0000000011
1010100000
1001010010
1000010110
1001000110
1000000110
A-D conversion operation
Other operation
(A) ← (SI3–SI0)
(B) ← (SI7–SI4)
(SI3–SI0) ← (A)
(SI7–SI4) ← (B)
(A) ← (J1)
(J1) ← (A)
(SIOF) ← 0
Serial I/O starting
(SIOF) = 1 ?
After skipping
(SIOF) ← 0
(A) ← (AD5–AD2)
(B) ← (AD9–AD6)
However, in the comparator mode,
(A) ← (AD3–AD0)
(B) ← (AD7–AD4)
(A) ← (AD1, AD0, 0, 0)
(AD3–AD0) ← (A)
(AD7–AD4) ← (B)
(A) ← (Q1)
(Q1) ← (A)
(ADF) ← 0
A-D conversion starting
(ADF) = 1 ?
After skipping
(ADF) ← 0
(A) ← (Q2)
(Q2) ← (A)
(PC) ← (PC) + 1
RAM back-up
POF instruction valid
(P) = 1 ?
(WDF1) ← 0
(WEF) ← 1
(A) ← (MR)
(MR) ← (A)
(A) ← (Q3)
(Q33, Q32) ← (A3, A2)
(Q31) ← (CMP1 comparison result)
(Q30) ← (CMP0 comparison result)
Serial I/O control operation