Renesas 16-bit single-chip microcomputer, M16C/6NL, M16C/6NN manual - page 8

A-4
18. CAN Module.................................................................................................................... 198
18.1 CAN Module-Related Registers............................................................................................................. 199
18.1.1 CAN Message Box......................................................................................................................... 199
18.1.2 Acceptance Mask Registers...........................................................................................................199
18.1.3 CAN SFR Registers....................................................................................................................... 199
18.2 CAN0 Message Box............................................................................................................................... 200
18.3 Acceptance Mask Registers...................................................................................................................202
18.4 CAN SFR Registers ...............................................................................................................................203
18.5 Operational Modes................................................................................................................................. 210
18.5.1 CAN Reset/Initialization Mode .......................................................................................................210
18.5.2 CAN Operation Mode..................................................................................................................... 211
18.5.3 CAN Sleep Mode ...........................................................................................................................211
18.5.4 CAN Interface Sleep Mode ............................................................................................................211
18.5.5 Bus Off State..................................................................................................................................212
18.6 Configuration CAN Module System Clock .............................................................................................213
18.7 Bit Timing Configuration......................................................................................................................... 213
18.8 Bit-rate ...................................................................................................................................................214
18.9 Acceptance Filtering Function and Masking Function............................................................................215
18.10 Acceptance Filter Support Unit (ASU)..................................................................................................216
18.11 Basic CAN Mode.................................................................................................................................. 217
18.12 Return from Bus off Function ...............................................................................................................218
18.13 Time Stamp Counter and Time Stamp Function.................................................................................. 218
18.14 Listen-Only Mode................................................................................................................................. 218
18.15 Reception and Transmission................................................................................................................219
18.15.1 Reception..................................................................................................................................... 220
18.15.2 Transmission................................................................................................................................ 221
18.16 CAN Interrupt .......................................................................................................................................222
19. Programmable I/O Ports ................................................................................................. 223
19.1 PDi Register........................................................................................................................................... 224
19.2 Pi Register, PC14 Register ....................................................................................................................224
19.3 PURj Register ........................................................................................................................................224
19.4 PCR Register .........................................................................................................................................224
20. Flash Memory Version ....................................................................................................235
20.1 Memory Map ..........................................................................................................................................236
20.1.1 Boot Mode...................................................................................................................................... 237
20.2 Functions to Prevent Flash Memory from Rewriting ..............................................................................237
20.2.1 ROM Code Protect Function.......................................................................................................... 237
20.2.2 ID Code Check Function................................................................................................................ 237
20.3 CPU Rewrite Mode ................................................................................................................................239
20.3.1 EW0 Mode .....................................................................................................................................240
20.3.2 EW1 Mode .....................................................................................................................................240
20.3.3 FMR0, FMR1 Registers .................................................................................................................241
20.3.4 Precautions on CPU Rewrite Mode ...............................................................................................245
20.3.5 Software Commands .....................................................................................................................247
20.3.6 Data Protect Function ....................................................................................................................252
20.3.7 Status Register (SRD Register)..................................................................................................... 252
20.3.8 Full Status Check........................................................................................................................... 254