A-2
7.2 Bus Control ................................................................................................................................................46
7.2.1 Address Bus....................................................................................................................................... 46
7.2.2 Data Bus ............................................................................................................................................46
7.2.3 Chip Select Signal..............................................................................................................................46
7.2.4 Read and Write Signals .....................................................................................................................48
7.2.5 ALE Signal ......................................................................................................................................... 48
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7.2.6 RDY Signal ........................................................................................................................................49
7.2.8 BCLK Output...................................................................................................................................... 50
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7.2.7 HOLD Signal...................................................................................................................................... 50
7.2.9 External Bus Status When Internal Area Accessed...........................................................................52
7.2.10 Software Wait...................................................................................................................................52
8. Clock Generating Circuit .....................................................................................................56
8.1 Types of Clock Generating Circuit..............................................................................................................56
8.1.1 Main Clock .........................................................................................................................................64
8.1.2 Sub Clock...........................................................................................................................................65
8.1.3 On-chip Oscillator Clock ....................................................................................................................66
8.1.4 PLL Clock........................................................................................................................................... 66
8.2 CPU Clock and Peripheral Function Clock ................................................................................................68
8.2.1 CPU Clock and BCLK........................................................................................................................ 68
8.2.2 Peripheral Function Clock.................................................................................................................. 68
8.3 Clock Output Function ...............................................................................................................................68
8.4 Power Control ............................................................................................................................................69
8.4.1 Normal Operation Mode..................................................................................................................... 69
8.4.2 Wait Mode.......................................................................................................................................... 71
8.4.3 Stop Mode..........................................................................................................................................73
8.5 Oscillation Stop and Re-oscillation Detection Function .............................................................................78
8.5.1 Operation When CM27 Bit = 0 (Oscillation Stop Detection Reset).................................................... 78
8.5.2 Operation When CM27 Bit = 1 (Oscillation Stop, Re-oscillation Detection Interrupt) ........................78
8.5.3 How to Use Oscillation Stop and Re-oscillation Detection Function.................................................. 79
9. Protection ............................................................................................................................80
10. Interrupt............................................................................................................................. 81
10.1 Type of Interrupts..................................................................................................................................... 81
10.2 Software Interrupts................................................................................................................................... 82
10.2.1 Undefined Instruction Interrupt.........................................................................................................82
10.2.2 Overflow Interrupt ............................................................................................................................82
10.2.3 BRK Interrupt ...................................................................................................................................82
10.2.4 INT Instruction Interrupt ...................................................................................................................82
10.3 Hardware Interrupts .................................................................................................................................83
10.3.1 Special Interrupts............................................................................................................................. 83
10.3.2 Peripheral Function Interrupts.......................................................................................................... 83
10.4 Interrupts and Interrupt Vector .................................................................................................................84
10.4.1 Fixed Vector Tables..........................................................................................................................84
10.4.2 Relocatable Vector Tables............................................................................................................... 84
10.5 Interrupt Control .......................................................................................................................................86
10.5.1 I Flag................................................................................................................................................ 88
10.5.2 IR Bit ................................................................................................................................................88
10.5.3 ILVL2 to ILVL0 Bits and IPL............................................................................................................. 88