Rev. 5.00, 09/03, page 56 of 760
case, the MMU will generate an exception, change the physical memory mapping, and record the
new address translation in for mation.
Although the functions of the MMU could also be implemented by software alone, the need for
translation to be perfor med by software each time a process accesses physical memory would
result in poor efficiency. For this reason, a buffer for address translation (translation look-aside
buffer: TLB) is provided in hardware to hold fre quently used address translation information. The
TLB can be described as a cache for storing address translation information. Unlike cache
memory, however, if address translation fails, that is, if an exception is generated, switching of
address translation information is normally performed by software. This makes it possible for
memory management to be performed flexibly by software.
The MMU has two methods of mapping from virtual memory to physical memory: a paging
method using fixed-length address translation, and a segment method using variable-length
address translation. With the paging method, the unit of translation is a fixed-size address space
(usually of 1 to 64 kbytes) called a page. This LSI uses the paging method.
In the following text, the SH7709S address space in virtual memory is referred to as virtual
address space, an d addres s space in physical mem ory as physical memory space.