Rev. 5.00, 09/03, page 548 of 760
In serial reception, th e SCIF operates as described below.
1. The SCIF monitors the transmission line, and if a 0 start bit is detected, performs internal
synchronization and starts reception.
2. The received data is stored in SCRSR in LSB-to-MSB order.
3. The parity bit and stop bit are received.
After receiving these bits, the SCIF carries out the following checks.
a. Stop bit check: Th e SCIF ch e cks whethe r the stop bit is 1. If there are two stop bits, only
the first is checked.
b. The SCIF checks whether receive data can be transferred from the recei ve s hi ft register
(SCRSR) to SCFRDR.
c. Break check: The SCIF checks that the BRK flag is 0, indicating that the break state is not
set.
If all the above checks are passed, the receive data is stored in SCFRDR.
Note: Reception is not suspended w h en a receive error occur s.
4. I f the RIE bit in SCSR is set to 1 when the RDF or DR flag changes to 1, a receive-FIFO-data-
full interrupt (RXI) request is generated.
If the RIE bit in SCSR is set to 1 when the ER flag changes to 1, a receive-error interrupt (ERI)
request is generated.
If the RIE bit in SCSR is set to 1 when the BRK flag c hanges to 1, a break reception interrupt
(BRI ) request is gene rated.