Rev. 5.00, 09/03, page 638 of 760
Bit 5—D/A Enable (DAE): Controls D/A conversion, together with bits DAOE0 and DAOE1.
When the DAE bit is cleared to 0, D/A convers ion is controlled independently in channels 0 an d 1.
When the chip enters standby mode while D/A conversion is enabled, the D/A output is held and
the analog power-su pply cu rrent is equiva lent to that during D/A conversion. To reduce the a nalog
power-supply current in standby mode, clear the DAOE0 and DAOE1 bits and disable the D/A
output.
Bit 7: DAOE1 Bit 6: DAOE0 Bit 5: DAE Description
0 0 — D/A conversion is di sab led in channels 0 and 1
(Initial value)
0 1 0 D/A conversion is enabled in channel 0
D/A conversion is di sabled in channel 1
0 1 1 D/A conversion is ena bled in channels 0 and 1
1 0 0 D/A conversion is di sabled in channel 0
D/A conversion is enable d in channel 1
1 0 1 D/A conversion is ena bled in channels 0 and 1
1 1 — D/A conversion is ena bled in channels 0 and 1
When the DAE bit is set to 1, even if bits DAOE0 and DAOE1 in DACR and the ADST bit in
ADCSR are cleared to 0, the same current is drawn from the analog power supply as during A/D
and D/A conversion.
Bits 4 to 0—Reserved: Read-only bits, always read as 1.