![](/images/new-backgrounds/1247219/247219185x1.webp)
Appendix B: BIOS POST Checkpoint Codes
Appendix B
BIOS POST Checkpoint Codes
When AMIBIOS performs the Power On Self Test, it writes checkpoint codes to I/O port 0080h. If the computer cannot complete the boot process, diagnostic equipment can be attached to the computer to read I/O port 0080h.
B-1 Uncompressed Initialization Codes
The uncompressed initialization checkpoint codes are listed in order of execution:
Checkpoint
D0h
D1h
D3h
D4h
D5h
Code Description
The NMI is disabled. Power on delay is starting. Next, the initialization code check- sum will be verifi ed.
Initializing the DMA controller, performing the keyboard controller BAT test, starting memory refresh and entering 4 GB fl at mode next.
Starting memory sizing next.
Returning to real mode. Executing any OEM patches and setting the Stack next.
Passing control to the uncompressed code in shadow RAM at E000:0000h. The initialization code is copied to segment 0 and control will be transferred to segment 0.