Clock
Appendix A: Options and Accessories
50% level of the Clock
Skew:
within ±4 ns
Level High:2 V or greater (into a 50 W termination)
Data | Middle point | |
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Level Low:0.8 V or less (into a 50 W termination)
Figure A14: Output Waveform
If a cable is used, these waveforms have transmission distortion. It is necessary to latch the data with a clock before using the waveform in actual circuits at the cable receiving side (user side) and to reproduce the waveform. Delay the clock with the delay line in order to reproduce the data reliably (see Figure
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Delay Line
ClockBuffer
0 10 ns
Figure A15: Data Latching
AWG2021 User Manual | A13 |