4-22 Theory of Operation

A simplified block diagram of the Super I/O controller is provided in Figure 4-10.

Figure 4-10 Super I/O Controller Block Diagram

Plug and Play Compatible:

16 bit addressing(full programmable)

10 selectable IRQs

3 selectable DMA Channels

3 SIRQ Inputs allows external devices to mapping IRQs

100-Pin TQFP package - PC87336VJG

Configuration
Registers UART
(16550 or 16450)
UART
+ IrDA/HP & Sharp IR
(16550 or 16450)
General
Purpose
Registers
Power
Down Logic
IEEEE1284
Parallel Port
Hifh Current Driver
Floppy Disk
Controller with
Digital Data
Separator
(Enhabced 8477)
I/O Ports Control Interrupt Data Handshake
Floppy
Drive
Interface
OSC Interrupt
and
DMA
Floppy
Drive
Interface
Interrupt IR
Interface
Serial
Interface
Interrupt
Serial
Interface
Config.
Inputs