HP VXI E1432A manuals
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220 pages 2.84 Mb
In This Book 5 1 Installing the HP E1432AInstalling the HP E1432A To inspect the HP E1432A To install the HP E1432A Install the host interface libraries To store the module To transport the module 2 Getting Started With the HP E1432AIntroduction To install the VXIplug&play libraries The VXIplug&play Soft Front Panel (SFP) HP VEE example programs C-LanguageHost Interface Library example programs Visual Basic example programs 6 3 Using the HP E1432AWhat is VXIplug&play Header and Library Files Channels and groups Multiple-module/mainframeMeasurements Module Features Measurement Process HP E1432A Interrupt Behavior New features of the HP E1432A/HP E1433A software 3-33 Auto range Where to get more information 7 4 The C-LanguageHost Interface LibraryParameter Information Multiple-module/MainframeMeasurements 5 Module DescriptionHP E1432A Front Panel Description VXI Backplane Connections The HP E1432A VXI Device Calibration Description 8 6 The Arbitrary Source Option (1D4)Arbitrary Source Description The Arbitrary Source Option Front Panel 7The Tachometer Option (AYF)Tachometer Description The Tachometer Option Front Panel 8 Break Out BoxesThe HP E1432-61600and HP E1432-61602Break Out Boxes Break Out Box Cables 9 9 Troubleshooting the HP E1432A10 Replacing AssembliesReplaceable Parts To remove the top cover To remove the front panel To remove the input assemblies To remove the option AYF assembly To remove the option 1D4 assembly To remove the A22/A24 assembly To remove the A1/A11 assembly 11 Backdating Appendix A Register DefinitionsThe HP E1432A VXI Registers A-2 HP E1432A Technical Specifications Glossary Index Need Assistance Declaration of Conformity About this edition13 Caution21 System Requirements (Microsoft Windows95 and NT)•Software is supplied on CD-ROM System Requirements (HP-UX10.20) •One of the following workstations: •Software is supplied on CD-ROM,so a CD-ROMdrive is needed HP-UX •SICL/VISA (product number E2091E, version E.01.01 or later) HP E1432A Software Distribution 22 Getting Updates Via FTP (HP-UX)Getting Updates Via FTP (Windows) 24 To install the HP-UXVXIplug&play drivers for the HP E1432A (for HP-UXsystems):The Resource Manager 25 Using the soft front panel26 The buttons on the right side of the SFP display are defined as follows:This button opens the Measurement Control dialog box. You can set: There is a checkbox to make all channels identical 28 scope.vee32 minimum.vee34 Other HP VEE example programs35 The files in the examples directory are:Makefile directory README A file containing the information given here detect.c in a system example.c block of data intr.c src_intr.c board, for overload shutdown and overread tachmon.c module throughput an HP E1562A disk module Demo Programs Other demo programs include “rpmtrig” and “rpmtrig2” 36 Running a demo program: semascope.c41 OverviewVXIplug&play drivers The HP E1432A VXIplug&play driver is based on the following architecture: Figure 3-7:VXI Plug&Play driver architecture It is most useful to discuss this architecture from the bottom up 42 Manufacturer and model codesThe following are the Hewlett-PackardVXI models in this file: Model Name 43 The Soft Front Panel (SFP)45 Channel GroupsInitialization 46 Creating a Channel GroupInput, Source, and Tach Channels 50 The cable adds approximately 6 ns per meter of cable51 MXI BusCable Figure 10: Multiple mainframes - three mainframes 53 Data Flow Diagram and FIFO Architecture54 triggerhost Static port RAM Local (DRAM) circular buffer trigger Figure 3-11:Data flow and FIFO architecture VME Bus Local Bus 55 Base Sample Ratesz e ro to 58 Sync/Trigger lineIdle Trigger Arm Meas Start of End of state 59 Idle63 trigger type67 Interrupt SetupInterrupt Mask Bit Definitions Define (in e1432.h) HPE1432_IRQ_TRIGGER HP E1432A Interrupt Handling Description Scan of data ready in FIFO FIFO overflow Measurement state machine changed state Measurement warning Overload status changed Source channel interrupt Raw tach times ready for transfer to other modules Trigger ready for transfer to other modules 68 This is a summary of how to set up an HP E1432A interrupt:HP E1432A interrupts with hpe1432_reenableInterrupt. The call to 71 Auto rangeAveraging Continuous re-sampleddata Fast span or range change Time arming Weighting filters (HP E1433A only) 72 Zoom (HP E1432A only)Zoom (for the Arbitrary Source, option 1D4) 73 The Function Reference for VXIplug&playThe Function Reference for the Host Interface Library (C-languageversion) 77 Header and Library Fileslib1432.a E1432A hardware lib1432.sl program smaller libd1432.a time llib-l1432.ln about this file 78 Description of HP E1432A Parameters79 Global Parameters81 51.2 kHz 4-channelInput Parameters82 Option 1D4 Single-channelSource Parameters83 Option AYF Tachometer Parameters84 Channel and Group IDs90 INTXFigure 4-2:Multiple mainframes - three mainframes 92 Sync/Trigger lineIdle Trigger Arm Meas End of 97 enabling function101 This is a summary of how to set up SICL to receive an HP E1432A interrupt:103 For More Information106 Module DescriptionGeneral Features Arbitrary Source Features (option 1D4) Tachometer Features (option AYF) Other Options 107 LBUS/FIFOBus connector micro Abus Bbus Local bus VXI bus SRAM PLL clock/ trigger Tachometer or... Source 109 Front Panels for 4, 8, and 16 Channels110 Standard Front Panel112 Power Supplies and GroundData Transfer Bus DTB Arbitration Bus Priority Interrupt Bus Utility Bus 113 The Local Bus (Option UGV)114 Address SpaceShared Memory Memory Map 116 List of A16 RegistersRead Write 3E16 3C16 3A16 2E16 2C16 2A16 1E16 1C16 1A16 0E16 0C16 0A16 117 Trigger Lines (TTLTRG)Sync/Trigger line Free-runningclock line VXI bus External Sample VXI 10 MHz ClockClock 24.576 MHz Clock MUX 10 MHz Crystal Clock Source or Tach Trigger Trigger Sync Sample (word rate) Logic PLL Generator to input circuits Figure 5-11:Clock/sync diagram 118 Providing an External Clock119 HP E1432A SubstrateInput circuitry DC Voltage Reference from CALIN Source CALOUT Output VXI SUMBUS Tachometer trigger 122 TriggerArbitrary Output Source Output Modes COLA (and Summer) External Shutdown 123 DACcircuitry Digital input filter Figure 6-13:Arbitrary source option block diagram 125 LED’s and Connectors for the Arbitrary Source OptionUpdating the arbitrary source firmware 128 Tachometer InputsExternal Trigger Input Tachometer Monitoring Exact RPM Triggering 129 Input Count DivisionHoldoff Time Analog 32-bit Latch Counter Registers Tach 131 LED’s and Connectors for the Tachometer Option134 Service136 HP E1432-61602 Voltage-typeBreak Out BoxHP E1432-61600 ICP-typeBreak Out Box Break Out Box Grounding 137 Making a Custom Break Out Box CableBackshell kit, plug Cable Connector, plug Shielded cable part number AMP qty: 138 pinpin # +Diff + Diff Recommendations on wiring for the E1432/3A 4 Channel Input Connector Allowed Connections 140 I2C_ENI2C_SDA I2C_SCL BOB_EN CAL_LOW CAL_HIGH 23-24V Power 24+/-24V GND Return 25+24 V Power In general: 143 Display usage messagePrint version info Hostdiag returns 0 upon success, or returns non-zeroif an error is detected Coverage: Notes: 146 Replacement parts are listed in the following tables:Ordering Information Direct Mail Order System 147 Code Numbers148 Assemblies: without option AYF or 1D4149 RefHP Part Mfr Des 150 Assemblies: with option AYF152 Assemblies: with option 1D4154 Cables: without option AYF or 1D4155 Cables: with option AYF156 Cables: with option 1D4157 Front Panel170 Main PC assembly change172 The A16 Registers173 A-3174 The A24 Registers7FFFF16 2FFFF16 1FFFF16 0003 F16 The A24 registers are defined as follows: 175 The VXI Bus Registers are defined as follows:(HP’s ID) (1MB of A24) Active Err Unused: A read of these bits will always return zero (0) 177 EnableSysfail Inhibit: A one (1) disables the device from driving the SYSFAIL* line Reset: A one (1) forces the device into a reset state LBus Enable: Writing a one (1) enables the Local Bus interface. Writing a zero (0) disables the local bus interface. RESET VALUE: 178 Bit 0:DSP A(17) Bit 1: DSP A(18) Bit 2: DSP A(19) Bit 3: DSP A(20) Bit 4: DSP A(21) Bit 5: DSP A(22) Bit 6: Bit 7: DSP A(31) The eight most significant bits of the Page Map Register are always zero (0) IRQ Line IRQ Enable: A one (1) in this bit enables the generation of IRQ’s. A zero (0)resets each of the eight interrupt causes and status bits. RESET VALUE: 179 Logical Address: This is the device’s current logical address180 32-bitRegisters1Always read all 32 bits of a 32-bitregister 2Always read the most significant part first 182 Command/Response ProtocolThe Command/Response protocol uses the following resources: 184 DSP Protocol185 DSP Bus Registers200A Spare ST Done Loaded Ready Model Code Spare: This read/write bit has no pre-definedfunction 186 The DSP Command register has the following format:187 Rev. April188 Specifications2 of 189 3 of190 4 of191 Option 1D4 Arbitrary Source5 of 192 6 of193 7 of194 Option AYF Tachometer Input8 of 195 VXI System Level Specifications9 of 196 10 of197 11 of198 Specification NoteWarranty Information Abbreviations Fs = sample rate of ADC Fc = cut off frequency of high pass or low pass filters dBfs = dB relative to full scale amplitude range dBfs dBc = dB relative to carrier amplitude dBc Typical For More Information www.hp.com/go/data_acq HP E1432/33/34A Product Overview 5965-9834E 12 of 208 Index217 declares, that the productconforms to the following specifications: EMC: Supplementary Information:
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