Cypress CY7C68013A manual Program/Data RAM, Reset Timing Values Condition

CY7C68013A, CY7C68014A

CY7C68015A, CY7C68016A

Figure 2. Reset Timing Plots

RESET#	RESET#
	VIL
	3.3V
	3.0V
VCC	VCC
	0V
	TRESET

Power on Reset

VIL

3.3V

0V

TRESET

Powered Reset

Table 5. Reset Timing Values

Condition	TRESET
Power on Reset with Crystal	5 ms
Power on Reset with External	200 μs + Clock stability time
Clock
Powered Reset	200 μs

3.9.2 Wakeup Pins

The 8051 puts itself and the rest of the chip into a power down mode by setting PCON.0 = 1. This stops the oscillator and PLL. When WAKEUP is asserted by external logic the oscillator restarts after the PLL stabilizes, and the 8051 receives a wakeup interrupt. This applies whether or not FX2LP is connected to the USB.

The FX2LP exits the power down (USB suspend) state using one of the following methods:

■USB bus activity (if D+/D– lines are left floating, noise on these lines may indicate activity to the FX2LP and initiate a wakeup)

■External logic asserts the WAKEUP pin

■External logic asserts the PA3/WU2 pin

The second wakeup pin, WU2, can also be configured as a general purpose IO pin. This enables a simple external R-C network to be used as a periodic wakeup source. WAKEUP is by default active LOW.

3.10 Program/Data RAM

3.10.1 Size

The FX2LP has 16 KBytes of internal program/data RAM, where PSEN#/RD# signals are internally ORed to enable the 8051 to access it as both program and data memory. No USB control registers appear in this space.

Two memory maps are shown in the following diagrams: Figure 3 on page 8 shows the Internal Code Memory, EA = 0 Figure 4 on page 9 shows the External Code Memory, EA = 1.

3.10.2 Internal Code Memory, EA = 0

This mode implements the internal 16 KByte block of RAM (starting at 0) as combined code and data memory. When external RAM or ROM is added, the external read and write strobes are suppressed for memory spaces that exist inside the chip. This enables the user to connect a 64 KByte memory without requiring address decodes to keep clear of internal memory spaces.

Only the internal 16 KBytes and scratch pad 0.5 KBytes RAM spaces have the following access:

■USB download

■USB upload

■Setup data pointer

■I2C interface boot load.

3.10.3 External Code Memory, EA = 1

The bottom 16 KBytes of program memory is external and therefore the bottom 16 KBytes of internal RAM is accessible only as a data memory.

Document #: 38-08032 Rev. *L Page 7 of 62

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