5.5.2.2.4Virtual mode addressing
Operating systems use another type of addressing, virtual addressing, to give user applications an effective address space that exceeds the amount of physical memory installed in the system. The operating system does this by paging infrequently used programs and data from memory out to disk, and bringing them back into memory on demand.
When applications access instructions and data in virtual addressing mode, they are not aware that their addresses are being translated by virtual memory management using page translation tables. These tables reside in system memory, and each partition has its own exclusive page table. Processors use these tables to transparently convert the virtual address for a program into the physical address where that page has been mapped into physical memory. In this case, if the page has been moved out of physical memory onto disk, the operating system receives a page fault. In a logical partitioning operation, the page translation tables are placed in reserved physical memory regions that are only accessible to the hypervisor. In other words, the page table for a partition is located outside the real mode address range of that partition. The register that provides the physical address of its page table to a processor is also protected by hardware logic, so it cannot be modified by partition programs, and can only be modified by the hypervisor.
When the operating system needs to create a page translation mapping, it must execute a specially designed hypervisor service call instruction on one of its processors, which transfers execution to a hypervisor program. The hypervisor program creates the page table entry on behalf of the partition, and adds a logical-
5.5.2.2.5Access to I/O address space
In addition to mapping virtual page addresses into the physical memory for a partition, the operating system can make hypervisor calls to map page table addresses into the physical register and buffer address spaces on PCI I/O adapters. Device drivers directly read and write these adapter registers and buffers, which is how they set up and control I/O operations on the PCI devices. In LPAR, the PCI I/O adapter must be assigned to a given partition before that operating system can make a mapping request service call; otherwise, the hypervisor will not permit the creation of the page table entry.
5.5.2.2.6Direct Memory Access addressing
PCI I/O adapter direct memory access (DMA) operations move data between I/O adapters and system memory, and they use a similar address relocation mechanism to page tables. PCI host bridge hardware translates addresses generated by I/O devices into physical memory addresses.
The I/O bridge makes this translation with a translation control entry (TCE) table, which is also stored in physical memory. As with page tables, this TCE table resides in a physical address region of system memory that is inaccessible by partitions, and only accessible by the hypervisor. Unlike page tables, however, TCE tables are not tied to any one partition. By calling a hypervisor service, partition programs can create, modify, or delete TCE table entries for the specific PCI adapters assigned to that partition. The hypervisor adds a physical address offset to the DMA target address provided by the partition program. When the I/O bridge translates an I/O adapter DMA address into physical memory, the resulting address falls within the physical memory space assigned to that partition.
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