Intel 87C196CB, 8XC196NT user manual can Message Object x Control 0 CANMSGxCON0 Register

CAN SERIAL COMMUNICATIONS CONTROLLER

CAN_MSGxCON0	Address:	1Ex0H (x = 1–F)
x = 1–15 (87C196CB)	Reset State:	Unchanged

Program the CAN message object x control 0 (CAN_MSGxCON0) register to indicate whether the message object is ready to transmit and to control whether a successful transmission or reception generates an interrupt. The least-significant bit-pair indicates whether an interrupt is pending.

This register consists of four bit-pairs — the most-significant bit of each pair is in true form and the least-significant bit is in complement form. This format allows software to set or clear any bit with a single write operation, without affecting the remaining bits.

87C196CB

7

MSGVAL MSGVAL TXIE TXIE

0

RXIE RXIE INT_PND INT_PND

Bit	Bit			Function
Number	Mnemonic
7:6	MSGVAL	Message Object Valid
5:4	TXIE	Transmit Interrupt Enable
		Receive message objects do not use this bit-pair.
		For transmit message objects, set this bit-pair to enable the CAN
		peripheral to initiate a transmit (TX) interrupt after a successful trans-
		mission. You must also set the interrupt enable bit (CAN_CON.1) to enable
		the interrupt.
		bit 5	bit 4
		0	1	no interrupt
		1	0	generate an interrupt
3:2	RXIE	Receive Interrupt Enable
		Transmit message objects do not use this bit-pair.
		For receive message objects, set this bit-pair to enable the CAN peripheral
		to initiate a receive (RX) interrupt after a successful reception. You must
		also set the interrupt enable bit (CAN_CON.1) to enable the interrupt.
		bit 3	bit 2
		0	1	no interrupt
		1	0	generate an interrupt
1:0	INT_PND	Interrupt Pending

Figure 7-18. CAN Message Object x Control 0 (CAN_MSGxCON0) Register

When the SIE bit in the CAN control register is set, the CAN controller generates a successful reception (RXOK) interrupt request each time it receives a valid message, even if no message ob- ject accepts it. If you set both the SIE bit (Figure 7-17) and an individual message object’s RXIE bit (Figure 7-18), the CAN controller generates two interrupt requests each time a message object receives a message. The status change interrupt is useful during development to detect bus errors caused by noise or other hardware problems. However, you should disable this interrupt during normal operation in most applications. If the status change interrupt is enabled, each status change generates an interrupt request, placing an unnecessary burden on the CPU. To prevent re- dundant interrupt requests, enable the error interrupt sources (with the EIE bit) and enable the re- ceive and transmit interrupts in the individual message objects.

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