3 SPECIFICATION

3.6.4 Moving average processing count setting (Address RWwm+2)

MELSEC-A

(1)Set the average processing count of the channel for which moving average processing has been specified in the CH. moving average processing specifying flag (RYn0 to RYn3).

(2)Sampling processing is performed for the channel whose CH. moving average processing specifying flag (RYn0 to RYn3) was not turned on, independently of the moving average processing count setting.

(3)Operation is performed according to the setting made for the leading edges of the initial data setting request flag (RY(n+1)9).

(4)The default setting is 4 times for all channels.

Bits b2, b3, b6, b7, b10, b11, b14 and b15 are ignored.

 

b15

b14

b13

b12

 

b11

b10

b9

b8

b7

b6

b5

b4

 

 

b3

b2

b1

b0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CH.4

 

 

 

 

 

 

CH.3

 

 

 

 

 

 

 

CH.2

 

 

 

 

 

 

 

 

CH.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ignored

 

 

 

 

Ignored

 

 

 

Ignored

 

 

 

 

 

Ignored

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Set Count

 

 

 

 

 

 

 

 

 

 

 

Set Value

 

 

 

 

 

 

 

 

 

 

 

 

4 times

 

 

 

 

 

 

 

 

 

 

 

 

0H

 

 

 

 

 

 

 

 

 

 

 

 

8 times

 

 

 

 

 

 

 

 

 

 

 

 

1H

 

 

 

 

 

 

 

 

 

 

 

 

16 times

 

 

 

 

 

 

 

 

 

 

 

 

2H

 

 

 

 

 

 

 

 

 

 

 

 

32 times

 

 

 

 

 

 

 

 

 

 

 

 

3H

 

 

 

 

 

3.6.5CH. Digital output value (Address RWrn to RWrn+3)

(1)The digital value after the A/D conversion is stored in the remote register address from RWrn to RWrn+3 for each channel.

(2)The digital output value is expressed in a 16-bit encoded binary.

b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0

Date section

b12 to b14 change to 1 when the sign is negative (1 at b15) and to 0 when it is positive (0 at b15).

(A negative digital value is expressed in 2's complement.)

Sign bit

1:Negative

0:Positive

3 - 16

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Image 31
Mitsubishi Electronics AJ65SBT-64AD user manual Moving average processing count setting Address RWwm+2, Times

AJ65SBT-64AD specifications

The Mitsubishi Electronics AJ65SBT-64AD is a high-performance programmable controller designed to meet the demanding requirements of modern automation systems. This module is part of the Mitsubishi FX series of programmable logic controllers (PLCs), known for their reliability, flexibility, and advanced features.

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In summary, the Mitsubishi Electronics AJ65SBT-64AD is a versatile and high-performance analog input module that offers numerous features tailored for automation applications. Its 64-channel capability, advanced signal processing, robust construction, and integration with Mitsubishi's ecosystem make it a valuable component for any modern industrial automation setup.