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4.4PHY Acknowledge Status Register (ALIVE)
The PHY acknowledge status register (ALIVE) is shown in Figure 31 and described in Table 24.
| Figure 31. PHY Acknowledge Status Register (ALIVE) |
31 | 16 |
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| ALIVE |
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15 | 0 |
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| ALIVE |
LEGEND: R/W = Read/Write; R/WC = Read/Write 1 to clear;
Table 24. PHY Acknowledge Status Register (ALIVE) Field Descriptions
Bit | Field | Value | Description |
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ALIVE |
| MDIO Alive bits. Each of the 32 bits of this register is set if the most recent access to the PHY with | |
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| address corresponding to the register bit number was acknowledged by the PHY; the bit is reset if |
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| the PHY fails to acknowledge the access. Both the user and polling accesses to a PHY will cause |
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| the corresponding alive bit to be updated. The alive bits are only meant to be used to give an |
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| indication of the presence or not of a PHY with the corresponding address. Writing a 1 to any bit |
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| will clear it, writing a 0 has no effect. |
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| 0 | The PHY fails to acknowledge the access. |
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| 1 | The most recent access to the PHY with an address corresponding to the register bit number was |
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| acknowledged by the PHY. |
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SPRUEF8F | C6472/TCI6486 EMAC/MDIO | 79 |
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