M-Systems Flash Disk Pioneers Flash Memory Flash Management, Sustained Read, Sustained Write

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Implementing MLC NAND Flash for Cost-Effective, High-Capacity Memory

Sustained Read

When comparing sustained read performance values in real-world scenarios for Binary Flash with MLC, the gap lessens considerably: MLC performance is 98 percent of Binary flash performance. Operations that both Binary flash and MLC require to support a sustained read operation – such as running the driver code and the file system code, and accumulating bus cycles to support address, command, error correction code and control information – account for closing the gap.

Sustained Write

A comparison of sustained write performance for both technologies in real-world scenarios must take into account an additional factor: making room for new data when no free space is available. This means adding to the calculation the time it takes to erase a flash unit and, depending on the time it takes to manage the flash (using M-Systems’ TrueFFS®, for instance, adds 5 percent of the time required to write a unit), this time as well. For Binary flash, these calculations result in a sustained write performance rate of 250KBytes per second on a low MIPS platform, or 4 ∝sec per byte for a typical mix of files, as compared with 172KBytes per second for MLC. (Note that the number of sectors per unit for MLC is twice the corresponding number for Binary flash.) When these figures are translated into percentages, MLC sustained write performance is approximately 69 percent of Binary flash write performance.

Write performance greatly varies according to the user’s access patterns, mainly the average file size. For large files the rate is much higher (up to approximately 600 KBytes per second); for very small files it is much lower. Here, unlike in read operations, the time that is required for file system handling is more significant than device driver time, especially when dealing with small files. Bus cycle time for writing is practically the same as for reading. All the remaining time is spent on software overhead.

Flash Management

Because of MLC’s unique architecture, pages can only be written sequentially, whereas in Binary flash they can be written randomly within the erase block. MLC also makes partial page programming impossible, as opposed to Binary flash technology that enables it. This means that the existing translation layers used by TrueFFS to support Binary flash devices, NFTL and INFTL, are unusable, since they rely on random page access. Sequential write only and the lack of partial page programming impose limitations on MLC that affect reliability as well as performance.

91-SR-014-02-8L

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Contents Written by Raz Dan and Rochelle Singer JanuaryBackground IntroductionBasic Flash Technology Comparing Binary and MLC Flash TechnologiesBasic Flash Cell Binary and MLC TechnologiesData Reliability Long-Term Data ErrorsProgram Disturb Errors MLC Benefits and LimitationsPerformance Read Disturb ErrorsSustained Read Flash ManagementSustained Write Overcoming MLC Limitations Robust Flash Management Enhanced EDC and ECC Efficient Bad Block Handling Unaligned Multiplane Bad Block AccessDMA Support MultiBurstParallel Multiplane Access Power ConsumptionSummary Techsupport@m -sys.com How to Contact Us