Intel NuPRO-850 BIOS Award / Phoenix BIOS advanced by ADLINK, Gigabit Ethernet, Graphic Display

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BIOS: Award / Phoenix BIOS advanced by ADLINK

DDR DIMM timing register, which provides the DIMM speed control for the entire array, must be programmed to use the timings of the slowest DIMMs installed. Note: DIMMs must be populated in identical pairs for dual-channel operation

BIOS: Award / Phoenix BIOS advanced by ADLINK

NuPRO-850 supports BIOS memory size up to 8Mbytes (Firmware Hub I/F).

Flash write protection will be implemented under software control. This bit must be set to 1 before any write will be allowed to the BIOS Flash.

Gigabit Ethernet

One 10/100/1000Mbps Ethernet interfaces via the Intel® 82547GI Gigabit Ethernet Controller. The 82547GI is connected to the CSA (Communicating Streaming Architecture) interface of the 82875P MCH.

Support 1000Base-T, 100Base-TX and 10Base-T (IEEE 802.3, 802.3u, and 802.3ab).

IEEE802.3x compliant flow control, support auto-negotiation and link setup.

Ethernet link status and activity LEDs on the RJ-45 connector.

Graphic Display

ATI Mobility M9 (AGP4X) or M10 (AGP8X) VGA chip with 64MB video memory.

Standard SVGA CRT analog output on bracket I/O panel.

Also supports 2nd CRT output (via one onboard 14-pin header) and one LVDS interface.

USB Interface

Supports four USB 2.0 ports, two connectors (USB0 & USB1) on bracket and the others (USB2 & USB3) are routed to one onboard 9-pin header

IDE Ports

Two IDE connectors support up to four drivers. Up to Ultra DMA 100 Mode.

Super I/O and WDT

Built-in HanceRapids, support 2-stage WDT, programmable timer 1 - 255 seconds or 1 - 255 minutes.

Introduction 9

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Contents Intel Pentium 4 processor User’s Manual NuPRO-850 Full-Size ePCI-X System Host BoardRecycled Paper Page Trademarks Questions Getting Service from ADLINKADLINK TECHNOLOGY INC Detailed Company InformationChapter 5 Watchdog Timer Table of ContentsChapter 2 Jumpers and Connectors Chapter 4 Device Driver InstallationIntroduction How to Use This GuideChapter 2 Connectors and Jumpers Driver InstallationIntroduction 1.1 Unpacking Checklist 1.2 Features 1.3 Functional Blocks and Main Board Functional Block DiagramMain Board Drawing mPGA478BAM P 1.3.4 Serial I/O 1.3.1 Intel Pentium 4 Processor1.3.2 Video 1.3.3 Ethernet Interfaces1.3.10 MiniPCI slot 1.3.7 Software1.3.8 AC’97 Link 1.3.9 Serial I/OCPU/Cache 1.4 SpecificationsCompliant Specifications Form FactorUSB Interface BIOS Award / Phoenix BIOS advanced by ADLINKGigabit Ethernet Graphic DisplayEnvironment Safety Certificate and TestHardware Monitor OS CompatibilityJumpers and Connectors 2.1.1 NuPRO-850 Top View 2.1 NuPRO-850 Board Outline and Illustration2.1.2 Front View PositionDescription SIGNAL 2.2 NuPRO-850 Connector Pin Assignments2.2.1 VGA CRT connector CN13 2.2.2 USB 2.0 connector CN16, CN17Status 2.2.3 Gigabit Ethernet connector LAN12.2.4 COM1 connector CN3 LED Color2.2.6 Case Open connector CN1 2.2.5 AC’97 connector CN62.2.7 VGA 2nd CRT pin header CN12 2.2.8 SATA-0 / SATA-1 connectors CN11, CN102.2.9 LVDS connector CN14 Table 11 LVDS connector CN1418 Jumpers and Connectors Fan speed 2.2.11 ATX 12V 4-pin connector PN12.2.12 Fan1 / Fan2 connector FN1/FN2 Fan power2.2.13 Primary/Secondary IDE Connector CN7, CN4 Signal NamePin # GROUP 2.2.14 Front Panel Pin Header CN222 Jumpers and Connectors 2.2.15 Mini PCI Socket CN9Table 16 Mini PCI Socket Pin Definition Page Getting Started 3.1 CPU Installation3.2 Memory Installation 3.2.1 Memory Configuration Options3.2.2 Installing Memory Modules 3.3 Connecting IDE Devices to the NuPRO-850 3.4 BIOS Configuration Overview 3.5 Operating System Installation Page Device Driver Installation 4.1 Intel 875P/6300ESB Chipset4.1.1 System Requirements \NuPRO\NuPRO-850\VGA\SETUP.EXE 4.2 Driver Installation4.1.2 Hardware Configuration File Installation 4.2.1 VGA Driver Installation4.2.2 LAN Driver Installation Page Watchdog Timer 5.1 Watchdog Timer5.1.1 WDT Overview 5.1.2 Configuration Registers Offset 10H Base Address Register BARPreload Value 1 & 2 registers Offset 68H WDT Lock Register Offset 60 - 61H WDT Configuration RegisterGeneral Interrupt Status Register Reload RegisterWDT LED Control 5.1.3 The procedure of programming WDT5.1.2 GPIO Control Registers WDTTOUT# pin selectionX\CHIPDRV\WDT\HRWDT for a more detailed explanation 5.1.4 UtilitiesPage 6.2.1 Standby Supply +3.3Vaux 6.2 Global SignalsePCI-X Bus Details 6.1 NuPRO-850 ePCI-X Bus6.3.2 VIO Electrical Keying 6.3 PCI-X Bus Signals6.2.5 PME# 6.3.1 Backplane PresentWarranty Policy Damage from improper repair by unauthorized ADLINK technicians This warranty is not transferable or extendibleOther categories not protected under our warranty 44 Warranty Policy