NEC 5800/1000 manual Highly Available Center Plane, Complete modularization and redundancy

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Mainframe-class RAS Features

Highly Available Center Plane

System restoration after the replacement of a failed crossbar card no longer requires a planned system downtime

The Express5800/1000 series server has separated and modularized the crossbar controller which ordinarily would reside on the system center plane. By moving the crossbar controller off of the center plane, a reduction in center plane failures has been realized.

In the unlikely event of a crossbar failure, only the partition that is linked to the crossbar will be temporarily shutdown, allowing for the other partitions to continue operations uninterrupted, including during the replacement of the crossbar card.

(The 1080Rf has a crossbar-less configuration.)

Failure

Down

Cell

Cell

Cell

Cell

Crossbar Controller Mudularization

Only the node that is linked directly to the failed crossbar

will be temporarily shutdown

Failure

 

Crossbar

 

 

 

 

Controller

 

 

(LSI)

Down

llCell

 

 

 

The failed crossbar

 

Crossbar

 

Card

card can be

 

 

 

replaced without halting

other business

llCell

llCell

operations.

 

 

Complete modularization and redundancy

Improvements in fault resilience, continuous operation and serviceability

Major components of the Express5800/1000 series servers have been modularized, allowing for better serviceability and easy replacement in the event of a component failure.

Furthermore, to minimize the existence of single point of failure, many of these modules have redundancy, allowing for continuous operations (fault resilience).

 

Front Side

 

Back Side

 

Fan box

 

Fan box

Service

 

 

 

Processor

 

 

 

Clock

Cell card

Crossbar

Cell card

card

Fan box

card

 

PCI Module

 

 

 

 

 

 

Fan box

PCI Box

HDD Module

Power

 

 

Distribution

 

 

Unit

Sample: Express5800/1320Xf

 

Operation 1

 

Operation 2

Spare

 

 

Operation 3

 

Operation 4

Redundant Crossbar

 

Node 1

 

Node 2

Cell Card

 

Node 3

 

Node 4

 

 

 

 

Redundant Clock Module

Cell card

Cell card

Cell card

Cell card

Cell card

Cell card

Cell card

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

(Redundancy or Segmentation)

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

CPU

Redundant service processor

Memory

Memory

Memory

Memory

Memory

Memory

Memory

Memory

Memory

Memory

Memory

Memory

Memory

Memory

N+1 redundant cooling fan

 

 

 

 

 

 

 

 

 

 

 

 

 

 

N+1 redundant power supply

 

 

Crossbar Card

 

 

 

 

Crossbar Card

Quick recovery is possible

 

 

 

 

 

 

 

 

 

 

 

 

 

 

with a spare CELL card

 

 

Crossbar Card

 

 

 

 

Crossbar Card

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1080Rf is crossbar-less

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Full redundancy is available on the

PCI box

PCI box

PCI box

 

 

PCI box

PCI box

PCI box

1320Xf/1160Xf. Segregation is available

 

 

on the 1320Xf

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Available on the 1320Xf/1160Xf

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2N is included in the 1320Xf, and is offered

 

 

 

 

 

 

 

 

 

 

 

 

 

 

as an option on the 1160Xf/1080Rf

 

 

 

Clock Card

 

 

 

 

 

 

Clock Card

 

* This picture illustrates a 1320Xf

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Service Processor

 

 

 

 

 

 

 

 

 

 

 

Cooling fan (N+1 redundant)

 

 

 

 

 

 

 

 

 

Power supply (N+1 / 2N redundant)

 

 

 

 

8

Image 8
Contents NEC Express5800/1000 Series Crossbar-less configuration Available only on 1080Rf Very Large Cache VLC ArchitectureDedicated Cache Coherency Interface CCI Resource virtualization through Floating IODual-Core Intel Itanium processor CellA3 Chipset Intel Itanium processor supported compiler Features for performance improvementCompiler Crossbar-less configuration VLC ArchitectureDedicated Cache Coherency Interface CCI Directory Based Cache CoherencyFramework for hardware, firmware and OS error handling RAS Design PhilosophyMemory Mirroring Partial Chipset degradationHighly Available Center Plane Complete modularization and redundancyDiagnostics of the error detection circuits Substantial strengthening of data integrityExpress5800/1000 Series Cell cardEnhanced error detection of the high-speed interconnect Two independent power sourcesRealization of a mainframe-class platform serviceability InternetSuperior standard chassis configuration Investment ProtectionResource virtualization through floating I/O Multi OS support / Rich application lineupProcessor Dual Core Intel Itanium processor L1 Cache/core 16KB I / 16KB DL2 Cache/core 1MB I / 256KB D L3 Cache/core 12MB