IBM 600 manual Bus Adapter, Invalidated When Microprocessor Performs, Address Space, Shadowed

Page 25

bus,

the

 

cache memory enters “snoop” mode and monitors all write

 

 

and

 

read

 

operations. If memory data is written

 

to

a

 

location

in

the

cache and the cache line is in

the “modified” state, the corresponding

cache line

is

written

 

back

to system

memory

 

and

invalidated.

 

 

 

When

the

 

microprocessor

performs

a

memory

read,

 

the

data

address

 

is

used

to find the data in the

cache. If

the

data is found (a hit), it is

read

from

the

cache

 

memory

and

no

external

 

bus

cycle

occurs. If

 

the

 

data

 

is

not

found

(a

miss),

an

 

external

bus

cycle is used to read

the

 

data

 

from

system

 

memory. If

the

address

of

the

missed

data

is

in

cacheable

address

 

space,

the data is

stored

in

the

cache

memory

and

 

the

remainder

of

 

the

cache

line

is

read.

 

 

 

 

 

 

 

 

 

When the microprocessor performs a memory write, the data

 

 

 

address

is

used

to

search

the

cache. If

 

the

address

is

found

(a hit),

the

 

data

 

is written to the cache

and

no

external

bus cycle is used to

write the data to system memory. (If the address of the write

 

operation

was not in the cache

memory but was in cacheable

 

 

 

address

space,

the

data

is

read

back

into

the

cache

memory and

the

remainder

of

the

cache line

is

read.)

 

 

 

 

 

 

 

 

 

 

 

 

Cacheable

Address

Space

 

 

 

 

 

 

 

 

 

 

 

 

Cacheable

address

space

is

defined

as

system

memory

that

resides

on the system board (0–640

KB and 1 MB–256 MB). Cacheability of

system

memory

is

up

to 64 MB for

Pentium

or 512 MB for Pentium II

in the L2 cache. Nothing in

address

range

hex A0000–BFFFF,

I/O

 

address

space,

or

memory

in

any

AT

slot

is

cached.

 

 

ROM address space (hex C0000–C9FFF and F0000–FFFFF) is L1

 

 

cacheable codefor read operations. Ifonlydata in this address

 

range

is

already

in

cache

memory

and the

address range is

written

to,

the

cached

line

is

invalidated

and

is

read

again

from

RAM, where

the

BIOS

is

shadowed.

 

 

 

 

 

 

 

 

 

Bus Adapter

When the computer is attached to the ThinkPad SelectaDock III docking system, the PCI adapters or AT-bus adapters can be used through the docking system.

System Board 2-3

Image 25
Contents Page 1998 First EditionNot Contents Miscellaneous System Functions ConfigurationNonmaskable Interrupt Control Port HexInstallation Check Bios Call PowerEvent SamplesPage Vii Viii Preface Preface Acoustical Readings Power Supply Voltages System Board Devices and FeaturesDescription Or thecomputer is a notebook-size computer that featuresIBM ThinkPad 600 computer hereafterThinkPadcalled Lists System Board devices and their features. System Board Devices and FeaturesDescribes Devices Products Type NumberController DriveBus Adapter PCI-busIs the I/O address map System Board I/O Address Map0DB0-0DBF HexTo -7 list the specifications for the computers SpecificationsSize Physical SpecificationsDiskette Without56 W Electrical SpecificationsVoltage KVAPower supply generates six Different Dc voltages VCC5M Power SupplyVoltages VCCSW. Figure Shows Maximum Current for Each VoltageOutput Protection Power Supply ConnectorVoltage Sequencing Pin VoltageProtection Battery PackDisplayable Characters and Symbols Hard Disk Keyboard/Mouse Connector SignalsConnectors Configuration Miscellaneous System FunctionsCache Memory Operation MicroprocessorThinkPad 600 uses Intel Pentium 233 ProcessorBus Adapter Invalidated When Microprocessor PerformsAddress Space ShadowedSignals Keyboard/Mouse ConnectorConnector Scan CodesKey Numbers for the 85-Key Keyboard For scan codes assigned to each numbered key,IBM refer to Keyboard IDFor displayable characters and symbols that are keyable from Displayable Characters and SymbolsExternal Bus Connector Hard Disk Drive ConnectorPin Signal Or Feature FeaturePart 1 Pin External Bus Connector Pin Assignments Part 2 Pin External Bus Connector Pin Assignments UltraSlim Bay Connector Part UltraSlim Bay Connector Pin Assignments SDD15 GND Format Size Diskette Drive and Controller44 MB ROM Subsystem MemoryRAM Subsystem System Detects an errorIs mapped Memory Controller Registers Shows Starting Above Hex BoundaryShows Pin Assignments For Dimm connector System board has two Dimm connectorsPin Signal Signal PinBytes Bytes Their AddressesBit NMI Mask Register HexBits Hex 0071RAM address to the RT/CMOS and NMI OperationsThese bits control the divider chain For Oscillator Frequency or Disable Divider outputThese bits allow the selection of a divider output BitFunctionThis Bit Indicates Whether Binary-coded-decimal Status Register Hex 00BIf set to 1, this bit indicates that an alarm interrupt has Interrupts Are Enabled Bits Status Register BIf set to 1, this bit indicates that an interrupt has Occurred Bits Indicate Type InterruptSet This Bit Indicates That Real-time Clock Has Lost Power Cmos RAM ConfigurationSet This Bit Indicates That Checksum Is incorrect Set This Bit Indicates That Time is InvalidBits 7-4These bits indicate the diskette drive type Installed Diskette DriveByte Hex 011 This byte defines the type BitsThese bytes are reserved These bits indicate the operating mode of the displayBits 5 Attached Video portLow High Expansion Low and high base memory bytes defineKB. Low byte is hex High Byte Hex 018 High Byte HexNonmaskable Interrupt NMI Miscellaneous System Functions and Ports0092 Port a HexCan Cleared Only Turning System Off This Bit Reserved0061 HexOther Passwords Power-On PasswordPassword Selectable Drive-Startup Sequence Hardware Compatibility Error Error CodesCode 34 Part 2 of 2. Error Codes System Board Video Subsystem Video Modes SubsystemsSubsystems Video SubsystemAlpha Buffer Max Type Colors Numeric Start Box Size Subsystems ThinkPad Modem Modem SubsystemMidi Port Function Sound Blaster Support FunctionTelephony Modem Function Telephony modem function provides the following settingsAudio Subsystem Serial PortLine Audio Port SpecificationsLine Subsystems IRQ Level and DMA Channel Infrared IR SubsystemIRQ Level Not Supported System unit resumes operation from suspend mode when itCurrent Per Slot Shows Pin Assignments for the Pcmcia slots Pin AssignmentsPin Bit PC Card For Each Slot including Both Slots and V pp CurrentMIDI/Joystick Port IDE Channel on the UltraSlim BayMidi Interface Address IRQ LevelJoystick Interface Subsystems System DisabledMemory Hex Address HexHex Channel DMAScsi Page Get Power Power ManagementSet Power Get TimerRequest System Hibernation. . . . . . . . . . . . . B.-52 Power Management System ConfigurationOverview System InformationHeader image Get Entry point for Service Bios must provide the following headerSystems That Support Stored Top Header ImageEntry Point Information Word16-Bit Parameter Structure Calling ConventionUses Stack/data area Directly With Selector When Field Offset Length HexLength Hex FieldSample in Assembler Language Sample in C Language Calling Convention Pseudo Code Following describes the calling convention using pseudo codeReturn Codes Get System Identification Function Description System Information ServiceCPU ID Get CPU InformationGet Display Device Get Docking Station Information FDD Get UltraBayGet Slave Micro Control Unit Information Status Get Video Information Get Refresh Rate Capability Smapi Bios B-21 State System Configuration ServiceSmapi Bios B-23 Set Display Device Get Pointing Device State Set Pointing Device State Get Hotkey Sticky/Lock Set Hotkey Sticky/Lock Get Power Management Mode Power Management ServiceSet Power Management Mode Get Timer Control Output Field Set Timer Control Event Bit Definition Get System Event Global Condition Set System Event Get System Event Condition Set System Event Condition Smapi Bios B-39 Input Field Get System Timer Set System Timer Get Hibernation Timer Set Hibernation Timer Smapi Bios B-45 Set System Event Condition Smapi Bios B-47 Set System Resume Condition Timer Set System Resume Suspend Request System StandbyOff Request System HibernationData Structure SamplesParameters Smapi Bios B-55 Fpinparm Function Declaration Installation Check Smapi Bios B-59 Byte SMBHDRSIG4 Smapi Bios B-61 Bios Call Bit Protected Mode SMB Or any Subject=NoticesAre LocalSmapi Bios Index ROM PCI RT/CMOS Smapi Devices parallel controller RAM subsystem
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600 specifications

The IBM 600 series is a notable line of enterprise-level servers that has garnered attention for its robust performance, advanced features, and scalability suitable for large organizations. Originally introduced as part of IBM's initiative to provide businesses with powerful computing solutions, the IBM 600 servers have evolved to meet the growing demands of modern data environments.

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