Quatech 802.11B/G manual SPI Interface, SPI AC Characteristics, UART2 Pin Debug

Page 22

Quatech, Inc.

Airborne Enterprise Module Databook

 

 

7.0SPI Interface

The following section details the SPI interface specification for both hardware timing and SPI protocol. The device is a SPI slave and requires a compatible SPI master for operation.

7.1

Pinout

 

 

 

 

 

 

 

 

 

 

 

 

When the SPI interface is enabled, through the CLI or web interface, the

 

 

following pins are assigned for communication.

 

 

 

 

 

 

 

 

 

 

Table 11 - SPI Pinout Details

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin Definition

 

 

 

SPI

 

 

UART2 Pin

 

 

Debug

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Master In Slave Out (MISO)

 

 

28

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Master Out Slave In (MOSI)

 

 

24

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SPI Interrupt (SPI_INT)

 

 

22

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SPI Clock (SPI_CLK)

 

 

18

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SPI Select (/SPI_SEL)

 

 

12

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data In (RxD2, DTXD)

 

 

 

 

 

9

 

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Data out (TxD2, DRXD)

 

 

 

 

 

21

 

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ready-to-Send (RTS2)

 

 

 

 

 

17

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Clear-to-Send (CTS2)

 

 

 

 

 

19

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 12 - SPI Signal Descriptions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Pin Definition

 

 

 

 

Description

 

 

 

 

 

 

 

 

 

 

 

 

Master In Slave Out (MISO)

 

Serial Data OUT; must be connected to the serial data in of

 

 

 

 

 

the master.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Master Out Slave In (MOSI)

 

Serial Data IN; Must be connected to the serial data out of the

 

 

 

 

 

master.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SPI Interrupt (SPI_INT)

 

Interrupt signal driver by slave see Table 16 for details of

 

 

 

 

 

operation.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SPI Clock (SPI_CLK)

 

SPI clock sourced from the master.

 

 

 

 

 

 

 

 

 

 

 

 

SPI Select (/SPI_SEL)

 

Enable the SPI slave, sourced from the master. Active low

 

 

 

 

 

signal.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7.2SPI AC Characteristics

The following specification identifies the required hardware timing to successfully implement a SPI interface with the Airborne Device Server module.

22

8/11/2009

100-8080-110

Image 22
Contents Product Specification Airborne Enterprise Module Databook Quatech Confidential Quatech, Inc. HeadquartersAirborne Enterprise Module Databook Contents Figures Terminology ConventionsFile Format Product Description WLNG-AN-DP500 Module ExampleBlock Diagram WLNG-SE/SP/AN/ET-DP500 Block DiagramModel Numbers Model NumbersPin out and Connectors Module Pin DefinitionGpio CTS2 Uart Ethernet PHY Port Digital Uart PortsUart Pin Definition Debug/Console Port Serial Peripheral Interface SPIGeneral Purpose Input/Output Gpio Connector Definition RF ShieldSymbol Parameter Min Typ Max Units Electrical & RF SpecificationOperating Conditions & DC Specification Absolute Maximum Values1Transmitting @ 11Mb/s 10/100 100% Duty Cycle RF Characteristics 802.11b/g Symbol Parameter Rate Mb/s Min Average Peak Units DBm / mWBand Supported Data Rates Mb/s Band Region Freq Range No. Channels GHzTransmit Power Radio Typical Performance Range AC Electrical Characteristics TransmitterPerformance/Range Typical Outdoor DistanceUART2 Pin Debug SPI AC CharacteristicsSPI Interface Pin Definition DescriptionSPI Protocol SPI Read/Write TimingCommand Name Description Hex SPI CommandsSPI Command Description Tx Message HeaderIntena Antenna Selection AntennaHost Board Mounted Antenna Embedded Antenna Antenna Type Features Cost Size Availability PerformanceHost Chassis Mounted Antenna Embedded Antenna OptionsAntenna Location Performance Airborne Enterprise Module Databook Reset Function Symbol ParameterRF Connector Radio Connector DF12-36DS-0.5VXX HiroseBoard Connector DF12-36DP-0.5VXX Hirose Mechanical OutlineFCC RF Exposure Statement Certification & Regulatory ApprovalsFCC Statement Information for Canadian Users IC Notice11.4 FCC/IOC Modular Approval Country StandardRegulatory Test Mode Support Mechanical Approvals Physical & Environmental ApprovalsTest Reference Conditions Change Log Date Section Change Description Author

802.11B/G specifications

Quatech 802.11B/G is a versatile wireless communication solution that has gained recognition for its reliability and performance in various industrial applications. Designed primarily for the industrial automation sector, this product offers robust connectivity and data transmission capabilities over Wi-Fi networks.

One of the standout features of the Quatech 802.11B/G is its compliance with the IEEE 802.11b and 802.11g standards. This ensures compatibility with a wide range of devices, enabling seamless integration into existing networks. The device supports data rates of up to 54 Mbps in the 802.11g mode, which is essential for applications that require quick and efficient data transfer.

In terms of technology, Quatech employs advanced wireless communication protocols that ensure a stable connection and minimize data loss. This is particularly important in industrial settings, where interruptions can result in costly downtime. The device utilizes error correction and encryption techniques to maintain the integrity and security of data being transmitted over the air.

Another important characteristic of the Quatech 802.11B/G is its operational range. The device can maintain a reliable connection across a significant distance, depending on the environmental conditions. This feature is crucial for applications that involve monitoring and control in large facilities, warehouses, or outdoor settings.

Power consumption is another critical aspect of the Quatech 802.11B/G design. The device is engineered for energy efficiency, making it suitable for applications where power resources may be limited. This feature allows for extended operational life in battery-powered devices without sacrificing performance.

The Quatech 802.11B/G is also equipped with multiple interfaces, including serial and Ethernet ports, facilitating easy connectivity with a wide array of devices. This versatility supports integration with various industrial equipment, sensors, and controllers, making the device highly adaptable to different environments.

Furthermore, the Quatech 802.11B/G is designed with durability in mind. It is built to withstand harsh conditions typical of industrial settings, ensuring long-lasting functionality and reducing the need for frequent maintenance or replacements.

In conclusion, the Quatech 802.11B/G offers a reliable and efficient wireless connectivity solution for industrial applications. Its compliance with industry standards, advanced communication protocols, extensive operational range, energy efficiency, and robust design make it a preferred choice for businesses looking to enhance their operational capabilities.