Quatech QSCLP-100 user manual Enabling the Special Registers, Interrupt Status Register

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4.2 Enabling the Special Registers

The QSCLP-100 contains two unique registers, an Interrupt Status Register and an Options Register. These registers are enabled when the SPAD jumper (J6) is removed (factory default). They replace the UART Scratchpad Register on accesses to register address 7.

The Interrupt Status Register and Options Register are accessed through the scratchpad location of any UART. The DLAB bit of the UART (Line Control Register, bit 7) is used to select between the two registers. The most recent write of a DLAB bit in any UART selects between the two registers as shown in Figure 6.

DLAB Bit

SPAD Jumper

Register selected for

address 7 accesses

 

 

0

removed

Interrupt Status Register

1

removed

Options Register

X

applied

Scratchpad Registers

Figure 7 --- DLAB bit selects between special registers

4.3 Interrupt Status Register

The read-only Interrupt Status Register can be used to quickly identify which serial ports require servicing after an interrupt. Reading the Interrupt Status Register will return the interrupt status of the entire QSCLP-100, as shown in Figure 7. The individual bits are cleared as the interrupting ports are serviced. The interrupt service routine should ensure that the interrupt status register reads zero before exiting.

Bit

Description

 

 

7 (MSB)

0 (not used)

 

 

6

0 (not used)

 

 

5

0 (not used)

 

 

4

0 (not used)

 

 

3

Port 4 --- 1 if interrupt pending

 

 

2

Port 3 --- 1 if interrupt pending

 

 

1

Port 2 --- 1 if interrupt pending

 

 

0

Port 1 --- 1 if interrupt pending

 

 

Figure 8 --- Interrupt Status Register

QSCLP-100 User's Manual

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Contents QSCLP-100 General Information Hardware Configuration Factory Default ConfigurationEnable Scratchpad Register SPAD, J2 Force High-Speed Uart Clock X2, X4, or X8, J3-J5Clock multiplier jumper options Hardware Installation Jumper/connector locationsThis page intentionally blank Address Map and Special Registers Base Address and Interrupt Level IRQEnabling the Special Registers Interrupt Status RegisterOptions Register Enhanced Serial Adapter IdentificationClock Rate Multiplier RR1 RR0Windows Configurations Windows MillenniumWindows Windows Windows Using the New Hardware Found Wizard Viewing Resources with Device Manager Page Page Page Other Operating Systems Windows NTOS/2 DOS and other operating systemsQTPCI.EXE Basic Mode display QTPCI.EXE Expert Mode display External Connections RS-232 Port Signal Page Troubleshooting Computer will not boot upDate of Purchase Model Number QSCLP-100 Product Description Declaration of Conformity Table of Contents Page PCI Resource Map INTA#Specifications ICL3245CARevision January

QSCLP-100 specifications

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