Freescale Semiconductor SEC2SWUG Driver Initialization Routine, Request Dispatch Routine

Page 4

Device Driver Components

2.1.1 Driver Initialization Routine

The driver initialization routine includes both OS-specific and hardware-specific initialization. The steps taken by the driver initialization routine are as follows:

•Finds the security engine core and sets the device memory map starting address in IOBaseAddress.

•Initialize the security engine's registers

—Controller registers

—Channel registers

—EU registers

•Initializes driver internal variables

•Initializes the channel assignment table

—The device driver will maintain this structure with state information for each channel and user request. A mutual-exclusion semaphore protects this structure so multiple tasks are prevented from interfering with each other.

•Initializes the internal request queue

—This queue holds requests to be dispatched when channels become available. The queue can hold up to 24 requests. The driver will reject requests with an error when the queue is full.

•ProcessingComplete() is spawned then pends on the IsrMsgQId which serves as the interface between the interrupt service routine and this deferred task.

2.1.2 Request Dispatch Routine

The request dispatch routine provides the ioctl() interface to the device driver. It uses the callers request code to identify which function is to execute and dispatches the appropriate handler to process the request. The driver performs a number of tasks that include tracking requests, queuing requests when the requested channel is unavailable, preparing data packet descriptors, and writing said descriptor's address to the appropriate channel; in effect giving the security engine the direction to begin processing the request. The ioctl() function returns to the end-user application without waiting for the security engine to complete, assuming that once a DPD (data packet descriptor) is initiated for processing by the hardware, interrupt service may invoke a handler to provide completion notification

2.1.3 Process Request Routine

The process request routine translates the request into a sequence of one or more data packet descriptors (DPD) and feeds it to the security engine core to initiate processing. If no channels are available to handle the request, the request is queued.

2.1.4 Interrupt Service Routine

When processing is completed by the security engine, an interrupt is generated. The interrupt service routine handles the interrupt and queues the result of the operation in the IsrMsgQId queue for deferred processing by the ProcessingComplete() deferred service routine.

SEC 2.0 Reference Device Driver User’s Guide, Rev. 0

4

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

Freescale Semiconductor

Page 3 Page 5
Image 4
Page 3 Page 5
Contents Overview Freescale SemiconductorAcronyms and Abbreviations OverviewTerm Meaning SEC 2.0 Reference Device Driver User’s Guide, RevDevice Driver Components Device Driver StructureDevice Driver Components End-User ApplicationInterrupt Service Routine Driver Initialization RoutineRequest Dispatch Routine Process Request RoutineDeferred Service Routine User InterfaceApplication Interface User InterfaceError Handling = DpdaesacbcencryptcryptGlobal Definitions 1 I/O Control CodesChannel Definitions Second and Third Arguments in the ioctl FunctionCallback Error Status Return Code Operation ID opId MasksReturn Codes Channel DefinesSEC2ADDRESSPROBLEM SEC2CHAERRORSEC2PARITYSYSTEMERROR SEC2TEAERRORSEC2CANCELLEDREQUEST Miscellaneous Request StructuresSEC2INVALIDADDRESS Define DescriptionProcess Request Structures StatusreqNotifyonerror Scatter-Gather Buffer ManagementDirect Scatter-Gather Usage Example Individual Request Type Descriptions Random Number RequestsDES Requests RngreqARC4 Requests Descryptreq1 ARC4LOADCTXCRYPTREQ Descbccryptreq Valid Descriptors opIdARC4LOADCTXCRYPTREQ Valid Descriptor opId 2 ARC4LOADKEYCRYPTUNLOADCTXREQARC4LOADKEYCRYPTUNLOADCTXREQ Valid Descriptor opId Hashreq Hash RequestsHashreq Valid Descriptors 0x4400 opId Hmacpadreq Hmac RequestsHashreq Valid Descriptors 0x4500 opId Aesacryptreq AES RequestsHmacpadreq Valid Descriptors opId Integer Public Key Requests ModexpreqAesacryptreq Valid Descriptors opId Modexpreq Valid Descriptor opIdModssexpreq MODR2MODNREQModssexpreq Valid Descriptor opId DpdmmssrsaexpModrrmodpreq 5 MOD2OPREQModrrmodpreq Valid Descriptor opId 0x5300MOD2OPREQ Valid Descriptors opId Value Function Description Eccpointreq ECC Public Key RequestsMOD2OPREQ Valid Descriptors opId 2 ECC2OPREQ Eccpointreq Valid Descriptors opIdEccspkbuildreq ECC2OPREQ Valid Descriptors opIdEccspkbuildreq Valid Descriptor opId DpdecspkbuildulctxIPSec Requests EccptadddblreqIpseccbcreq Eccptadddblreq Valid Descriptor opIdIpseccbcreq Valid Descriptors opId Descriptors Ipsececbreq Ipsececbreq Valid Descriptors opIdIpsecaescbcreq Ipsecaescbcreq Valid Descriptors opIdIpsecaesecbreq Ipsecespreq Ipsecaesecbreq Valid Descriptors opIdIpsecespreq Valid Descriptors opId Dpdipsecespinsdescbcdcrptshapad DPDIPSECESPOUTTDESCBCCRPTMD5PADDpdipsecespouttdescbccrptshapad DPDIPSECESPINTDESCBCDCRPTMD5PAD10 802.11 Protocol Requests Srtp Protocol RequestsCcmpreq SrtpreqDES Sample Sample CodeSrtpreq Valid Descriptors opId Ipsec Sample PRELIMINARY-SUBJECT to Change Without Notice Linux Environment InstallationOperation Driver Operation in User Mode VxWorks EnvironmentDriver Module License Macro VxWorks EnvironmentPorting Building the Interface ModulesBSP Integration VxWorks Interface Module VariablesHeader Files Interrupt Service RoutineSource Files Debug Messaging Conditional CompilationDistribution Archive How to Reach Us

SEC2SWUG specifications

Freescale Semiconductor, a prominent player in the semiconductor industry, has made significant strides in developing robust solutions tailored for the automotive and industrial sectors. One such innovation is the SEC2SWUG (Security Configuration to Software User Guide), a comprehensive framework designed to enhance security protocols across various applications.

The SEC2SWUG is particularly vital in an era where cybersecurity threats are increasingly sophisticated. This tool is built to help developers implement security measures seamlessly during the software design phase, ensuring products are resilient against potential vulnerabilities. One of the main features of the SEC2SWUG is its versatility; it can be applied across a wide range of microcontrollers and processors offered by Freescale. This is particularly advantageous for engineers who require a consistent security approach across different platforms.

In terms of technology, the SEC2SWUG incorporates advanced cryptographic algorithms, allowing for data encryption, decryption, and authentication processes. This ensures that sensitive information remains secure, particularly in automotive applications where vehicle-to-everything (V2X) communication is becoming paramount. Moreover, the guide details the implementation of secure boot processes, which verify the integrity of firmware before it executes, bolstering overall system security.

Another key characteristic of SEC2SWUG is its user-friendliness. Freescale has focused on creating a resource that not only provides theoretical knowledge but also practical guidelines, making it easier for developers to integrate security protocols into their projects. The guide features clear annotations, example code snippets, and troubleshooting tips, which enhance the developer experience and facilitate a smoother transition from concept to execution.

Additionally, SEC2SWUG is designed to be scalable. As industries evolve, the demand for security measures will only grow, and this framework ensures that developers can adapt their solutions accordingly. Whether working on embedded systems, IoT applications, or complex automotive networks, the SEC2SWUG offers a robust security foundation.

In conclusion, Freescale Semiconductor's SEC2SWUG is a vital tool for engineers and developers looking to embed security into their applications. With its focus on advanced technologies and user-centric design, the SEC2SWUG stands at the forefront of secure software development, addressing the critical need for safety in interconnected systems.
Top Page Image Contents