Cypress STK11C68 manual Features, Functional Description

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STK11C68

64 Kbit (8K x 8) SoftStore nvSRAM

Features

25 ns, 35 ns, and 45 ns access times

Pin compatible with industry standard SRAMs

Software initiated nonvolatile STORE

Unlimited Read and Write endurance

Automatic RECALL to SRAM on power up

Unlimited RECALL cycles

1,000,000 STORE cycles

100 year data retention

Single 5V+10% operation

Commercial and industrial temperature

28-pin (330 mil) SOIC package

28-pin (300 mil) CDIP and 28-pad (350 mil) LCC packages

RoHS compliance

Functional Description

The Cypress STK11C68 is a 64Kb fast static RAM with a nonvol- atile element in each memory cell. The embedded nonvolatile elements incorporate QuantumTrap technology producing the world’s most reliable nonvolatile memory. The SRAM provides unlimited read and write cycles, while independent nonvolatile data resides in the highly reliable QuantumTrap cell. Data transfers under software control from SRAM to the nonvolatile elements (the STORE operation). On power up, data is automat- ically restored to the SRAM (the RECALL operation) from the nonvolatile memory. RECALL operations are also available under software control.

Logic Block Diagram

 

 

 

 

 

 

 

 

 

 

 

 

 

Quantum Trap

 

VCC

VCAP

 

 

 

 

 

 

 

 

 

 

 

 

 

A5

 

 

 

128 X 512

 

POWER

 

 

 

 

 

 

 

 

 

 

 

A6

DECODER

 

 

STORE

 

CONTROL

 

 

 

 

 

 

 

 

 

 

 

 

A7

 

 

RECALL

 

STORE/

 

 

 

 

 

 

 

 

 

 

A8

 

STATIC RAM

 

RECALL

HSB

 

 

 

 

ARRAY

 

 

 

A9

 

 

 

CONTROL

 

 

 

ROW

 

128 X 512

 

 

 

 

 

 

A11

 

 

 

 

 

 

SOFTWARE

 

 

A12

 

 

 

 

 

 

 

A0

- A12

 

 

 

 

 

 

 

DETECT

 

 

 

 

 

 

 

 

DQ0

 

 

COLUMN I/O

 

 

 

 

 

 

DQ1

BUFFERS

 

COLUMN DEC

 

 

 

 

 

 

DQ2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DQ3

 

 

 

 

 

 

 

 

 

DQ4

 

 

 

 

 

 

 

 

 

INPUT

 

 

 

 

 

 

 

 

 

DQ5

A0 A1 A2 A3 A4 A10

 

 

 

 

 

 

DQ6

 

 

 

 

 

 

 

 

 

DQ7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

 

WE

 

Cypress Semiconductor Corporation

198 Champion Court

San Jose, CA 95134-1709

408-943-2600

Document Number: 001-50638 Rev. **

 

 

 

 

 

 

Revised January 30, 2009

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Contents Functional Description FeaturesPin Definitions Pin ConfigurationsLow Average Active Power Hardware Recall Power UpDevice Operation Sram ReadBest Practices A12-A0 ModeMaximum Ratings DC Electrical CharacteristicsOperating Range Data Retention and EnduranceThermal Resistance CapacitanceAC Test Conditions Switching Waveforms AC Switching CharacteristicsMin Max ParameterSram Write Cycle Switching Waveform AutoStore Inhibit or Power Up RecallParameter Alt Description STK11C68 Unit Min Max Alt Description 25 ns 35 ns 45 ns Unit Min Max Software Controlled STORE/RECALL CycleOrdering Information Part Numbering Nomenclature STK11C68 S F 45 I TRPackage Type Operating Range Speed ns Ordering CodeSTK11C68-SF45TR STK11C68-SF45ITRPin 330 Mil Soic Package DiagramsPin 300 Mil Side Braze DIL Pad 350 Mil LCC New data sheet Sales, Solutions, and Legal InformationDocument History USB