Cypress CYV15G0100EQ manual Carrier Detect or Mute Indicator, Output, Input, +3.3V Power

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CYV15G0100EQ

Table 1. Pin Descriptions - CYV15G0100EQ Single Channel Cable Equalizer

 

Name

IO Characteristics

Signal Description

 

Control Signals

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLI

Analog Output

Cable Length Indicator. CLI provides an analog voltage proportional to the equalized

 

 

 

 

 

 

 

 

cable length. CLI works at both SD-SDI and HD-SDI data rates.

 

 

 

 

 

 

 

LVTTL IO

Carrier Detect or Mute Indicator.

 

CD/MUTE

 

 

 

 

 

 

 

 

Output:

 

 

 

 

 

 

 

 

When the incoming data stream is present and the cable length does not exceed the length

 

 

 

 

 

 

 

 

that is set by MCLADJ, the CD/MUTE outputs a voltage less than 0.8V.

 

 

 

 

 

 

 

 

When the incoming data stream is not present or the cable length exceeds the length that

 

 

 

 

 

 

 

 

is set by MCLADJ, the CD/MUTE outputs a voltage greater than 2.8V.

 

 

 

 

 

 

 

 

Input:

 

 

 

 

 

 

 

 

When the

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CD/MUTE pin is set LOW, the equalizer’s differential serial outputs are not

 

 

 

 

 

 

 

 

muted.

 

 

 

 

 

 

 

 

When the

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CD/MUTE pin is set HIGH, the equalizer’s differential serial outputs are muted.

 

MCLADJ

Analog Input

Maximum Cable Length Adjust. The maximum equalized cable length is set by the

 

 

 

 

 

 

 

 

voltage applied to the MCLADJ input. When the maximum cable length set by MCLADJ

 

 

 

 

 

 

 

 

is reached, CD is driven high and the differential output is muted.

 

 

 

 

 

 

 

 

If MCLADJ functionality is not needed, then this pin should be left floating or tied to ground

 

 

 

 

 

 

 

 

to allow maximum equalized cable length.

 

 

 

 

 

 

 

 

MCLADJ works at both SD and HD data rates.

 

 

 

 

 

BYPASS

LVTTL Input

Equalizer Bypass. When BYPASS is set HIGH, the signal presented at the equalizer’s

 

 

 

 

 

 

 

 

differential serial inputs (SDI, SDI) is routed to the equalizer’s differential serial outputs

 

 

 

 

 

 

 

 

(SDO, SDO) without equalizing.

 

 

 

 

 

 

 

 

When BYPASS is set LOW, the incoming video data stream is equalized and presented

 

 

 

 

 

 

 

 

at the equalizer‘s serial differential outputs (SDO, SDO).

 

 

 

 

 

 

 

 

In equalizer bypass mode,

 

 

 

 

 

 

 

 

 

 

 

 

CD/MUTE is not functional.

 

AGC±

Analog

Automatic Gain Control. Place a capacitor of 1 μF between the AGC± pins.

 

 

 

 

 

 

 

 

SDO,

 

 

 

Differential

Differential Serial Outputs. The equalized serial video data stream is presented at the

 

SDO

 

 

 

 

 

 

 

Output

SDO/SDO differential serial CML output.

 

SDI,

 

 

 

Differential

 

 

 

 

 

 

 

 

accepts either a single-ended or differential serial

 

SDI

Differential Serial Inputs. SDI/SDI

 

 

 

 

 

 

 

Input

video data stream over 75Ω coaxial cable.

 

Power

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

Power

+3.3V Power.

 

 

 

 

 

GND

Gnd

Connect to Ground.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Document Number: 001-12520 Rev. **

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Contents Features Functional DescriptionCypress Semiconductor Corporation 198 Champion Court CYV15G0100EQ Equalizer Block DiagramCYV15G0100EQ Prosumer Video Cable Equalizer Block Diagram PinoutsOutput Carrier Detect or Mute IndicatorPower +3.3V PowerMcladj Equalizer OperationDC Electrical Characteristics Maximum RatingsOperating Range AC Electrical Characteristics Typical Performance Graphs Interfacing CYV15G0100EQ to the HOTLink II SerDes Typical Application CircuitPackage Type Operating Range Package DimensionOrdering Information Ordering CodeNew datasheet Document History1396423

CYV15G0100EQ specifications

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