Chapter 4 Award BIOS Setup
5.DRAM CAS Latency
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends on the DRAM timing.
6.Bank Interleave
7.Precharge to Active (Trp)
8.Active to Precharge (Tras)
This item controls the number of DRAM clocks for TRAS.
9.Active to CMD (Trcd)
10.DRAM Command Rate
This item set the DRAM command rate.
AGP & P2P BRIDGE CONTROL:
The options for these items are found in its sub menu. By pressing the <ENTER> key, you are prompt to enter the sub menu of the detailed options as shown below:
Phoenix – Award CMOS Setup Utility
AGP & P2P Bridge Control
AGP Aperture Size | [64M] |
| Item Help | |
AGP Driving Control | [Audo] |
| ||
|
| |||
X AGP Driving Value | DA |
|
| |
|
| |||
AGP Fast Write | [Disabled] |
| Menu Level ► | |
AGP Master 1 | WS Write | [Disabled] |
|
|
AGP Master 1 | WS Read | [Disabled] |
|
|
|
|
|
| |
↑↓→←:Move Enter: Select | ESC:Exit F1:General Help | |||
F5: Previous Values | ||||
|
|
|
|
|
Descriptions on each item above are as follows:
1.AGP Aperture Size
This field determines the effective size of the Graphic Aperture used for a particular GMCH configuration. It can be updated by the
Page: |