SOYO SY-5SSM/5 manual Chipset Features, Spread Spectrum

BIOS Setup Utility SY-5SSM & SY-5SSM/5

CHIPSET FEATURES SETUP (Continued)

CHIPSET FEATURES

Memory Hole At 15M-16M

PCI Post Write Buffer

PCI Delayed Transaction

Setting	Description	Note
Disabled		Default
Enabled	Some interface cards will
	map their ROM address to
	this area. If this occurs,
	select [Enabled] in this field.
0.5-8 MB
Disabled	Enable/disable PCI post	Default
Enabled	write buffer.
Disabled	The chipset has an	Default
Enabled	embedded 32-bit posted
	write buffer to support delay

transactions cycles. Select Enabled to support compliance with PCI specification version 2.1.

Spread Spectrum

Disabled		Default
0.25%(Cntr)	When using Spread

Spectrum 0.25%(Cntr) for

FCC or DOC testing.

0.50%(Down) When using Spread Spectrum 0.50%(Down) for FCC or DOC testing.

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