AMD D900K manual SB VT8237A-2 IDE, ISA & Sata

Schematic Diagrams

SB VT8237A-2 IDE, ISA & SATA

R_PPHD[0..15]

+2.5VS

VDD3

VDD2.5

H_TX_P_C

H_TX_P_C(21)

S_TX_P_C

S_TX_P_C(21)

R_PPHD[0..15](21)

H_TX_M_C

S_TX_M_C

4.6mA

H_RX_M_C

H_TX_M_C(21)

S_RX_M_C

S_TX_M_C(21)

Power Up Strappings :

SDD[0..15]

H_RX_M_C(21)

S_RX_M_C(21)

SDD[0..15] (27)

H_RX_P_C

S_RX_P_C

J9 J10 J11 J12 K9 L9 L18 M9 M18 N9 N18 P9 P18 R9 R18 T9 T18 U9 U18 V9 V10 V11 V12 V13 V14 V15 V16 V17 V18

AA4 AB4 AB5 AB6

T4 U4

C868

H_RX_P_C(21)

S_RX_P_C(21)

GPIO[D,A,C] => LDT Frequency

(VD[1:0],VID3)

+3VS

U13B

0.1UF

000 - 200MHz (Default)

R_PPHD0

CPUSTP#

AA22

PDD3

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSUS33-1 VSUS33-2 VSUS33-3 VSUS33-4

VSUS25-1 VSUS25-2

T1

ACZ_BITCLK

R625

4.7K

001 - 400MHz

R_PPHD4

AB26

ACZ_SDOUT

R210

2.2K

010 - 600MHz

R_PPHD1

Y24

PDD0

SERIRQ

R635

4.7K

R_PPHD2

AA26

PDD1

TPO

R233

4.7K

011 - 800MHz

R_PPHD3

AA25

PDD2

ICHSPK

R234

4.7K

100 - 1000MHz

R_PPHD5

AC26

PDD4

ACBITCLK

U3

ACZ_SDIN0

ACZ_BITCLK(21,25,27,29)

GPIOB => LDT Width

(VD[2])

R_PPHD6

AC23

PDD5

ACSDIN0

V2

ACZ_SDIN1

ACZ_SDIN0(25,27)

0 - 8-Bit (Default)

R_PPHD7

AD25

PDD6

ACSDIN1

U1

ACZ_SDIN2

ACZ_SDIN1(21,29)

VDD3

1 - 16-Bit

R_PPHD8

AD26

PDD7

ACSDIN2/GPIO20/PCS0

V3

ACZ_SDIN3

R_PPHD9

AC24

PDD8

ACSDIN3/SLP_BTN/GPIO21/PCS1

T2 R596

22

ACZ_SYNC (21,25,27,29)

PEWAKE#

R623

4.7K

PDA2 => ROMSIP Select

R_PPHD10

AC25

PDD9

ACSYNC[ ]

U2 R597

22

RI#

R226

4.7K

0 - Disable (Default)

R_PPHD11

AB24

PDD10

ACSDO[SOE]

T3 R593

22

ACZ_SDOUT(21,25,27,29)

V_ADJ-

R631

4.7K

1 - Enable

R_PPHD12

AB23

PDD11

ACRST

R599

4.7K

ACZ_RST# (21,25,27,29)

V_ADJ+

R236

4.7K

R_PPHD13

AA24

PDD12

R604

4.7K

VDD3

SMBCLK

R632

4.7K

-PDCS3 => Test Mode Select

R_PPHD14

Y26

PDD13

W4

PEHPSCI#

PME#

(17,19,20,22,24,29)

SMBDATA

R227

4.7K

0 - Disable (Default)

R_PPHD15

AA23

PDD14

PME

V4

WOW_CNTL# R615

4.7K

1 - Enable

PDD15

BATLOW/GPI5

Y1

PEPMSCI#

PEHPSCI#(9)

PEHPSCI#

R600

4.7K

(21) R_PPDRVREQ

R_PPDRVREQ

Y23

CPUMISS/GPI17

Y2

RI#

PEPMSCI#(9)

PEPMSCI#

R220

4.7K

SEEDI => Internal EEPROM Strapping

R_PPDMACK#

V24

PDDREQ

RING/GPI3

Y3

SUS_ST#

SUS_ST# (10,24)

THERMTRIPA#_R614SD

4.7K

(21) R_PPDMACK#

R_PPIOR#

W26

PDDACK[ ]

SUSST1/GPO3

Y4

THERMTRIPA#_SD

PME#

R605

10K

0 - External EEPROM (On board)(Default)

(21)

R_PPIOR#

R_PPIOW#

Y25

PDIOR

AOLGPI/GPI18/THRM

AA1

A

C

RB751V

EXTSMI#(24)

SWI#

R624

10K

1 - BIOS porting - ACR

(21) R_PPIOW#

R_PPIORDY

Y22

PDIOW

EXTSMI/GPI2

AB1

D14

C

SUS_ST#

R606

10K

(21) R_PPIORDY

R_PPDCS1#

V22

PDRDY

SMBALRT

AC1

A

CPU_ALERT#(3,24)

5

4

(21) R_PPDCS1#

R_PPDCS3#

V23

PDCS1[ ]

LID/GPI4

AD2

D15

RB751V

SCI#

(24)

SUS_CLK

6

3

PDA0 => HCLK Selection

[For VT8237]

(21) R_PPDCS3#

R_PPDA0

W23

PDCS3[SDCS3]

PWRBTN

AF1

PWROK_NB#

PWRBTN#(24)

CPU_ALERT#

7

2

0

-

External HCLK enable (Default)

(21)

R_PPDA0

R_PPDA1

V25

PDA0[SDA0]

PWROK

AB7

CLKRUN#

PWROK_NB#(10)

SUSA#

8

1

1

-

Internal HCLK enable

(21)

R_PPDA1

R_PPDA2

W24

PDA1[SDA1]

CLKRUN

AC7

CPUSTP#

VBAT

1 - Enable

Sheet 12 of 40

(21)

R_PPDA2

SDD0

AC20

PDA2[SDA2]

CPUSTP/GPO5

AE1

INTRUDER

IRQ14

AD24

AD6

PCISTP#

PDA1 => External loop test mode

(21)

IRQ14

IRQ14

PCISTP/GPO6

RN31

8P4R-10K

0 - Disable

(Default)

SDD1

AB20

SDD0/TBC1_SDD0

INTRUDER/GPI16

AC4

SMBCLK

+3VS

SB VT8237A-2 IDE,

SDD4

AF18

SDD3/RXD2_SDD3

SDD2

AC21

SDD1/VALID_SDD1

AB3

SUS_CLK

GPI0

R235

1M

SDD3

AE18

SDD2

SUSCLK/GPO4

INTRUDER R237

1M

SDD5

AD18

SDD4/RXD3_SDD4

SMBCK1

AB2

SMBDATA

SMBCLK (2,5,20,27)

+5VS

ISA & SATA

SDD6

AD19

SDD5/RXD4_SDD5

SMBDT1

SMBDATA (2,5,20,27)

SDD7

AF19

SDD6/RBC0_SDD6

AC3

V_ADJ-

V_ADJ- (33)

IRQ14

R627

4.7K

R_PPDA2

R616

1K

SDD8

AE20

SDD7/RBC1_SDD7

SMBCK2/GPIO27

AD1

V_ADJ+

CLKRUN#

(13)

SEEDI

SEEDI

R193

1K(R)

SDD9

AF20

SDD8/RXD5_SDD8

SMBDT2/GPIO26

Y5

PEWAKE#

V_ADJ+ (33)

R626

4.7K

R617

2.2K(R)

SDD10

AD20

SDD9/RXD6_SDD9

WAKE#

AA2

SUSA#

PEWAKE#(9)

ACZ_SDIN1

R215

4.7K(R)

R583

2.2K

SDD11

AE21

SDD10/RXD7_SDD10

SUSA/GPO2_GPO1

AD3

SUSB_SB#

SUSB_SB# (8,21,31)

ACZ_SDIN2

R209

4.7K

SDD12

AF21

SDD11/RXD8_SDD11

SUSB/NC_GPO2

AF2

SUSC#

ACZ_SDIN3

R598

4.7K

SDD13

AD21

SDD12/RXD9_SDD12

SUSC

GPI0

SUSC#

(16,24)

SDD14

AD22

SDD13/TXD0_SDD13

AE2

SDD15

AF22

SDD14/TXD1_SDD14

GPI0

AC2

SWI#

(24)

+3VS

SDD15/TXD2_SDD15

GPI1

AA3

(27)

SDDREQ

SDDREQ

AD17

GPO0

AE3

GATE_PCIRST#

WOW_CNTL#(28)

SREXT

R636

4.32K_1%

R243

1K(R)

SDDACK#

AD23

SDDRQ/RXD1_SDDRQ

GPO1_NC

AE5

GPIOA

GATE_PCIRST#

R242

1K(R)

(27)

SDDACK#

SDIOR#

AF23

SDDACK/TBC0_SDDACK

GPIOA/GPIO24[SA17]_GPO17[SA17]

AD5

GPIOB

D04

R247

1K(R)

(27)

SDIOR#

SDIOW#

AE23

SDIOR/TXD4_SDIOR

GPIOB/GPIO25[SA18]_GPO18[SA18]

AF5

GPIOC

GPIOC

R244

1K(R)

(27)

SDIOW#

SDIORDY

AF17

SDIOW/TXD3_SDIOW

GPIOC/GPIO30[SA16]_GPO16[SA16]

AC6

GPIOD

R639

2.2K

(27)

SDIORDY

SDCS#1

AF25

SDRDY/RXD0_SDRDY

GPIOD/GPIO31[SA19]_GPO19[SA19]

GPIOA

R246

2.2K

(27)

SDCS#1

SDCS#3

AF26

SDCS1/TXD8_SDCS1[ ]

SERIRQ

AD9

SERIRQ

SERIRQ (17,22,24)

GPIOD

R641

2.2K

(27)

SDCS#3

SDA0

AF24

SDCS3/TXD9_SDCS3[ ]

AF8

ICHSPK

GPIOB

R640

2.2K

(27)

SDA0

SDA1

AC22

SDA0/TXD6_SDA0[ ]

SPKR[ ]

AB8

SIO_OSC

ICHSPK (24)

25MHZXO_S

(27)

SDA1

SDA2

AE24

SDA1/TXD5_SDA1[ ]

OSC

TPO

SIO_OSC(2)

(27)

SDA2

IRQ15

AE26

SDA2/TXD7_SDA2[ ]

AF9

25MHZXI_S

(27)

IRQ15

SIDEVREF

AC19

IRQ15

TPO

AE9

R634

4.7K

Y2

SVREF_NC

TEST

VDDA0

360_1%(R)SATA50COMP

VDDA0_NC

AC10

25MHZ

R608

AB21

SCOMPP_NC

AB10

GNDA0

1

2

H_TX_P_C

C892

0.01UF

STX1+

AB13

GNDA0_NC

+3VS

+3VS

STXP1_NC

SREXT

H_TX_M_C

C893

0.01UF

STX1-

AC13

AD11

C293

C292

R_PPDCS1# R601

R_PPDCS3#R607

H_RX_M_C C291

SRX1-

STXN1_NC

SREXT_NC

25MHZXO_S

2.2K

1K(R)

1200PF

AF13

SRXN1_NC

SXO_NC[SOE]

AE10

16PF

16PF

1 - Disable SATA master/slave mode

R217

2.2K

H_RX_P_C

C290

1200PF

SRX1+

AE13

SRXP1_NC

AF10

25MHZXI_S

+3VS

S_TX_P_C

C895

0.01UF

STX2+

AB15

SXI_NC[ROMCS]

STXP2_NC

VDDA33

R_PPDMACK#R213

S_TX_M_C

C894

0.01UF

STX2-

AC15

VDDA33_NC

AE11

2.2K

S_RX_M_C C289

SRX2-

STXN2_NC

1 - Disable external SATA PHY

+3VS

1200PF

AF15

SRXN2_NC

GNDA33_NC

AF11

R_PPDA1

S_RX_P_C

C288

1200PF

SRX2+

AE15

+3VS

R218

1K(R)

SRXP2_NC

GND

W5

PCISTP#

NEAR CHIPSET

W12

VDDATS_NC1

V5

R245

4.7K

R224

2.2K

GND

W13

VDDATS_NC2

GND

M16

R638

4.7K(R)

W14

N11

VDDATS_NC3

GND

W15

N12

VDDATS_NC4

GND

0/1:Enable/disable100Mhz VLink clock

+3VS

W16

GNDATSNC10 GNDATSNC11 GNDATSNC12 GNDATSNC13 GNDASNC1 GNDASNC2 GNDASNC3 GNDASNC4

N13

+2.5VSATA

VDDATS_NC5

GNDATSNC1 GNDATSNC2 GNDATSNC3 GNDATSNC4 GNDATSNC5

GNDATSNC6 GNDATSNC7 GNDATSNC8 GNDATSNC9

GND

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

N14

AC17

VDDAS_NC1

GND

N15

VBAT

+3VS

R_PPDA0

R231

1K(R)

C300

C885

C879

AC11

VDDAS_NC2

GND

N16

ACZ_SYNC R207

4.7K(R)

R225

2.2K

AB17

(13)

VBAT

10UF

0.1UF

0.1UF

AB11

VDDAS_NC3

R208

4.7K

VDDAS_NC4

+3VS

AB14 AC14 AD12 AD13 AD14 AD15 AD16 AE12 AE14 AE16 AF12 AF14 AF16 AC16 AC12 AB16 AB12

F6

F7 J5 K5 P5 R5

L11 L12 L13 L14 L15 L16 M11 M12 M13 M14 M15

K18

(2,8,9,10,11,13,14,15,16,19,20,21,22,24,25,27,29,31,32,33)+3VS

VDD2.5

0/1 - Enable/disable LPC FWH command

VT8237A

VDDA0

L50

+2.5VS

(11,33) VDD2.5

+2.5VS

FCM2012V-121

	C302					SIDEVREF
	0.1UF		+2.5VSATA L101				(3,8,11,13,34) +2.5VS
					+2.5VS
			FCM2012V-121				VDD3
			C301	C898	C299	C886
VDDA33	L102	+3VS	0.1UF	10UF	0.1UF	0.1UF(R)	(3,11,14,16,18,21,24,26,30,31,32,33,34,35)VDD3
	FCM2012V-121						+5VS
	C900
	0.1UF						(11,14,15,16,21,22,24,29,31,32,33)+5VS

B.Schematic Diagrams

SB VT8237A-2 IDE, ISA & SATA B - 13